LM3S5737 Datasheet, PDF (7/833 Pages) Texas Instruments – Stellaris® LM3S5737 Microcontroller

Stellaris® LM3S5737 Microcontroller
12.3.4 Analog-to-Digital Converter .......................................................................................... 461
12.3.5 Differential Sampling ................................................................................................... 462
12.3.6 Internal Temperature Sensor ........................................................................................ 464
12.4 Initialization and Configuration ..................................................................................... 465
12.4.1 Module Initialization ..................................................................................................... 465
12.4.2 Sample Sequencer Configuration ................................................................................. 465
12.5 Register Map .............................................................................................................. 466
12.6 Register Descriptions .................................................................................................. 467
13 Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 493
13.1 Block Diagram ............................................................................................................ 494
13.2 Signal Description ....................................................................................................... 494
13.3 Functional Description ................................................................................................. 495
13.3.1 Transmit/Receive Logic ............................................................................................... 495
13.3.2 Baud-Rate Generation ................................................................................................. 495
13.3.3 Data Transmission ...................................................................................................... 496
13.3.4 Serial IR (SIR) ............................................................................................................. 496
13.3.5 FIFO Operation ........................................................................................................... 497
13.3.6 Interrupts .................................................................................................................... 498
13.3.7 Loopback Operation .................................................................................................... 499
13.3.8 DMA Operation ........................................................................................................... 499
13.3.9 IrDA SIR block ............................................................................................................ 499
13.4 Initialization and Configuration ..................................................................................... 499
13.5 Register Map .............................................................................................................. 500
13.6 Register Descriptions .................................................................................................. 501
14 Synchronous Serial Interface (SSI) .................................................................... 536
14.1 Block Diagram ............................................................................................................ 537
14.2 Signal Description ....................................................................................................... 537
14.3 Functional Description ................................................................................................. 538
14.3.1 Bit Rate Generation ..................................................................................................... 538
14.3.2 FIFO Operation ........................................................................................................... 538
14.3.3 Interrupts .................................................................................................................... 539
14.3.4 Frame Formats ........................................................................................................... 539
14.3.5 DMA Operation ........................................................................................................... 547
14.4 Initialization and Configuration ..................................................................................... 547
14.5 Register Map .............................................................................................................. 548
14.6 Register Descriptions .................................................................................................. 549
15 Inter-Integrated Circuit (I²C) Interface ................................................................ 576
15.1 Block Diagram ............................................................................................................ 577
15.2 Signal Description ....................................................................................................... 577
15.3 Functional Description ................................................................................................. 577
15.3.1 I²C Bus Functional Overview ........................................................................................ 578
15.3.2 Available Speed Modes ............................................................................................... 580
15.3.3 Interrupts .................................................................................................................... 581
15.3.4 Loopback Operation .................................................................................................... 581
15.3.5 Command Sequence Flow Charts ................................................................................ 582
15.4 Initialization and Configuration ..................................................................................... 589
15.5 Register Map .............................................................................................................. 590
November 17, 2011
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