LM3S5737 Datasheet, PDF (308/833 Pages) Texas Instruments – Stellaris® LM3S5737 Microcontroller

Micro Direct Memory Access (μDMA)
Table 8-13. μDMA Register Map (continued)
Offset Name
Type
Reset
Description
0x024 DMAREQMASKCLR
WO
-
DMA Channel Request Mask Clear
0x028 DMAENASET
R/W
0x0000.0000 DMA Channel Enable Set
0x02C DMAENACLR
WO
-
DMA Channel Enable Clear
0x030 DMAALTSET
R/W
0x0000.0000 DMA Channel Primary Alternate Set
0x034 DMAALTCLR
WO
-
DMA Channel Primary Alternate Clear
0x038 DMAPRIOSET
R/W
0x0000.0000 DMA Channel Priority Set
0x03C DMAPRIOCLR
WO
-
DMA Channel Priority Clear
0x04C DMAERRCLR
R/W
0x0000.0000 DMA Bus Error Clear
0xFD0 DMAPeriphID4
RO
0x0000.0004 DMA Peripheral Identification 4
0xFE0 DMAPeriphID0
RO
0x0000.0030 DMA Peripheral Identification 0
0xFE4 DMAPeriphID1
RO
0x0000.00B2 DMA Peripheral Identification 1
0xFE8 DMAPeriphID2
RO
0x0000.000B DMA Peripheral Identification 2
0xFEC DMAPeriphID3
RO
0x0000.0000 DMA Peripheral Identification 3
0xFF0 DMAPCellID0
RO
0x0000.000D DMA PrimeCell Identification 0
0xFF4 DMAPCellID1
RO
0x0000.00F0 DMA PrimeCell Identification 1
0xFF8 DMAPCellID2
RO
0x0000.0005 DMA PrimeCell Identification 2
0xFFC DMAPCellID3
RO
0x0000.00B1 DMA PrimeCell Identification 3
See
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8.5 μDMA Channel Control Structure
The μDMA Channel Control Structure holds the DMA transfer settings for a DMA channel. Each
channel has two control structures, which are located in a table in system memory. Refer to “Channel
Configuration” on page 290 for an explanation of the Channel Control Table and the Channel Control
Structure.
The channel control structure is one entry in the channel control table. There is a primary and
alternate structure for each channel. The primary control structures are located at offsets 0x0, 0x10,
0x20 and so on. The alternate control structures are located at offsets 0x200, 0x210, 0x220, and
so on.
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November 17, 2011
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