SM320C6201_15 Datasheet, PDF (7/76 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SM320C6201, SMJ320C6201B
DIGITAL SIGNAL PROCESSORS
SGUS028A -- NOVEMBER 1998 -- REVISED JANUARY 1999
Signal Descriptions (Continued)
SIGNAL
NAME
NO.
TYPE^†
DESCRIPTION
MULTICHANNEL BUFFERED SERIAL PORT 0 (McBSP0)
CLKS0
K18
I
External clock source (as opposed to internal)
CLKR0
L21 I/O/Z Receive clock
CLKX0
K20 I/O/Z Transmit clock
DR0
J21
I
Receive data
DX0
M21
O/Z Transmit data
FSR0
P16 I/O/Z Receive frame sync
FSX0
N16 I/O/Z Transmit frame sync
RSV0
RSV1
RSV2
RSV3
RSV4
RESERVED FOR TEST
N21
I
Reserved for testing, pull-up with a dedicated 20-kΩ resistor
K16
I
Reserved for testing, pull-up with a dedicated 20-kΩ resistor
B13
I
Reserved for testing, pull-up with a dedicated 20-kΩ resistor
B14
I
Reserved for testing, pull-up with a dedicated 20-kΩ resistor
F13
I
Reserved for testing, pull-down with a dedicated 20-kΩ resistor
RSV5
RSV6
RSV7
RSV8
C15
O Reserved (leave unconnected, do not connect to power or ground)
F7
I
Reserved for testing, pull-up with a dedicated 20-kΩ resistor
D7
I
Reserved for testing, pull-up with a dedicated 20-kΩ resistor
B5
I
Reserved for testing, pull-up with a dedicated 20-kΩ resistor
SUPPLY VOLTAGE PINS
C14
C8
E19
E3
H11
H13
H9
J10
J12
J14
DV_DD
J19
S 3.3-V supply voltage
J3
J8
K11
K13
K15
K7
K9
L10
L12
L14
† _{I = Input, O = Output, Z = High Impedance, S = Supply Voltage, GND = Ground}
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