SM320C6201_15 Datasheet, PDF (28/76 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SM320C6201, SMJ320C6201B
DIGITAL SIGNAL PROCESSORS
SGUS028A -- NOVEMBER 1998 -- REVISED JANUARY 1999
electrical characteristics over recommended ranges of supply voltage and operating case
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V_OH
V_OL
I_I
I_OZ
I_DD2V
High-level output voltage
Low-level output voltage
Input current^†
Off-state output current
Supply current, CPU + CPU memory
access^‡
DV_DD = MIN,
I_OH = MAX
DV_DD = MIN,
I_OL = MAX
V_I = V_SS to DV_DD
V_O = DV_DD or 0 V
CV_DD = NOM,
CPU clock = 167 MHz
I_DD2V Supply current, peripherals^§
CV_DD = NOM,
CPU clock = 167 MHz
I_DD3V Supply current, I/O pins^¶
DV_DD = NOM,
CPU clock = 167 MHz
C_i
Input capacitance
C_o
Output capacitance
† _{TMS and TDI are not included due to internal pullups.}
TRST is not included due to internal pulldown.
‡ _{Measured with average CPU activity:}
50% of time:
8 instructions per cycle, 32-bit DMEM access per cycle
50% of time:
2 instructions per cycle, 16-bit DMEM access per cycle
§ _{Measured with average peripheral activity:}
50% of time:
Timers at max rate
McBSPs at E1 rate
DMA burst transfer between DMEM and SDRAM
50% of time:
Timers at max rate
McBSPs at E1 rate
DMA servicing McBSPs
¶ _{Measured with average I/O activity (30-pF load, SDCLK on):}
25% of time:
Reads from external SDRAM
25% of time:
Writes to external SDRAM
50% of time:
No activity
’C6201
MIN TYP MAX
2.4
’C6201B
UNIT
MIN TYP MAX
2.4
V
0.6
±10
±10
1860
0.6 V
±10 uA
±10 uA
780
mA
200
140
mA
100
10
10
100
mA
10 pF
10 pF
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design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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