LM3S6100 Datasheet, PDF (6/559 Pages) Texas Instruments – Stellaris® LM3S6100 Microcontroller

Table of Contents
10.2 Signal Description ....................................................................................................... 348
10.3 Functional Description ................................................................................................. 349
10.3.1 Transmit/Receive Logic ............................................................................................... 349
10.3.2 Baud-Rate Generation ................................................................................................. 349
10.3.3 Data Transmission ...................................................................................................... 350
10.3.4 Serial IR (SIR) ............................................................................................................. 351
10.3.5 FIFO Operation ........................................................................................................... 352
10.3.6 Interrupts .................................................................................................................... 352
10.3.7 Loopback Operation .................................................................................................... 353
10.3.8 IrDA SIR block ............................................................................................................ 353
10.4 Initialization and Configuration ..................................................................................... 353
10.5 Register Map .............................................................................................................. 354
10.6 Register Descriptions .................................................................................................. 355
11
11.1
11.2
11.3
11.3.1
11.3.2
11.3.3
11.3.4
11.4
11.5
11.6
Synchronous Serial Interface (SSI) .................................................................... 389
Block Diagram ............................................................................................................ 389
Signal Description ....................................................................................................... 389
Functional Description ................................................................................................. 390
Bit Rate Generation ..................................................................................................... 390
FIFO Operation ........................................................................................................... 391
Interrupts .................................................................................................................... 391
Frame Formats ........................................................................................................... 391
Initialization and Configuration ..................................................................................... 399
Register Map .............................................................................................................. 400
Register Descriptions .................................................................................................. 401
12 Ethernet Controller .............................................................................................. 427
12.1 Block Diagram ............................................................................................................ 427
12.2 Signal Description ....................................................................................................... 428
12.3 Functional Description ................................................................................................. 430
12.3.1 MAC Operation ........................................................................................................... 430
12.3.2 Internal MII Operation .................................................................................................. 433
12.3.3 PHY Operation ............................................................................................................ 433
12.3.4 Interrupts .................................................................................................................... 434
12.4 Initialization and Configuration ..................................................................................... 435
12.4.1 Hardware Configuration ............................................................................................... 435
12.4.2 Software Configuration ................................................................................................ 436
12.5 Ethernet Register Map ................................................................................................. 437
12.6 Ethernet MAC Register Descriptions ............................................................................. 438
12.7 MII Management Register Descriptions ......................................................................... 456
13 Analog Comparator .............................................................................................. 475
13.1 Block Diagram ............................................................................................................ 475
13.2 Signal Description ....................................................................................................... 475
13.3 Functional Description ................................................................................................. 476
13.3.1 Internal Reference Programming .................................................................................. 477
13.4 Initialization and Configuration ..................................................................................... 478
13.5 Register Map .............................................................................................................. 478
13.6 Register Descriptions .................................................................................................. 479
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June 18, 2012
Texas Instruments-Production Data