LM3S6100 Datasheet, PDF (540/559 Pages) Texas Instruments – Stellaris® LM3S6100 Microcontroller

Register Quick Reference
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30
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1
0
GPIOAFSEL, type R/W, offset 0x420, reset - (see page 262)
GPIODR2R, type R/W, offset 0x500, reset 0x0000.00FF (see page 264)
AFSEL
GPIODR4R, type R/W, offset 0x504, reset 0x0000.0000 (see page 265)
DRV2
GPIODR8R, type R/W, offset 0x508, reset 0x0000.0000 (see page 266)
DRV4
GPIOODR, type R/W, offset 0x50C, reset 0x0000.0000 (see page 267)
DRV8
GPIOPUR, type R/W, offset 0x510, reset - (see page 268)
ODE
GPIOPDR, type R/W, offset 0x514, reset 0x0000.0000 (see page 269)
PUE
GPIOSLR, type R/W, offset 0x518, reset 0x0000.0000 (see page 270)
PDE
SRL
GPIODEN, type R/W, offset 0x51C, reset - (see page 271)
GPIOLOCK, type R/W, offset 0x520, reset 0x0000.0001 (see page 272)
GPIOCR, type -, offset 0x524, reset - (see page 273)
LOCK
LOCK
DEN
CR
GPIOPeriphID4, type RO, offset 0xFD0, reset 0x0000.0000 (see page 275)
GPIOPeriphID5, type RO, offset 0xFD4, reset 0x0000.0000 (see page 276)
PID4
GPIOPeriphID6, type RO, offset 0xFD8, reset 0x0000.0000 (see page 277)
PID5
GPIOPeriphID7, type RO, offset 0xFDC, reset 0x0000.0000 (see page 278)
PID6
GPIOPeriphID0, type RO, offset 0xFE0, reset 0x0000.0061 (see page 279)
PID7
GPIOPeriphID1, type RO, offset 0xFE4, reset 0x0000.0000 (see page 280)
PID0
PID1
540
June 18, 2012
Texas Instruments-Production Data