LM3S6100 Datasheet, PDF (354/559 Pages) Texas Instruments – Stellaris® LM3S6100 Microcontroller

Universal Asynchronous Receivers/Transmitters (UARTs)
The first thing to consider when programming the UART is the baud-rate divisor (BRD), since the
UARTIBRD and UARTFBRD registers must be written before the UARTLCRH register. Using the
equation described in “Baud-Rate Generation” on page 349, the BRD can be calculated:
BRD = 20,000,000 / (16 * 115,200) = 10.8507
which means that the DIVINT field of the UARTIBRD register (see page 363) should be set to 10.
The value to be loaded into the UARTFBRD register (see page 364) is calculated by the equation:
UARTFBRD[DIVFRAC] = integer(0.8507 * 64 + 0.5) = 54
With the BRD values in hand, the UART configuration is written to the module in the following order:
1. Disable the UART by clearing the UARTEN bit in the UARTCTL register.
2. Write the integer portion of the BRD to the UARTIBRD register.
3. Write the fractional portion of the BRD to the UARTFBRD register.
4. Write the desired serial parameters to the UARTLCRH register (in this case, a value of
0x0000.0060).
5. Enable the UART by setting the UARTEN bit in the UARTCTL register.
10.5
Register Map
Table 10-3 on page 354 lists the UART registers. The offset listed is a hexadecimal increment to the
register’s address, relative to that UART’s base address:
■ UART0: 0x4000.C000
Note that the UART module clock must be enabled before the registers can be programmed (see
page 201). There must be a delay of 3 system clocks after the UART module clock is enabled before
any UART module registers are accessed.
Note: The UART must be disabled (see the UARTEN bit in the UARTCTL register on page 367)
before any of the control registers are reprogrammed. When the UART is disabled during
a TX or RX operation, the current transaction is completed prior to the UART stopping.
Table 10-3. UART Register Map
Offset Name
Type
0x000 UARTDR
R/W
0x004 UARTRSR/UARTECR R/W
0x018 UARTFR
RO
0x020 UARTILPR
R/W
0x024 UARTIBRD
R/W
0x028 UARTFBRD
R/W
0x02C UARTLCRH
R/W
0x030 UARTCTL
R/W
Reset
0x0000.0000
0x0000.0000
0x0000.0090
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0300
Description
UART Data
UART Receive Status/Error Clear
UART Flag
UART IrDA Low-Power Register
UART Integer Baud-Rate Divisor
UART Fractional Baud-Rate Divisor
UART Line Control
UART Control
See
page
356
358
360
362
363
364
365
367
354
June 18, 2012
Texas Instruments-Production Data