LM3S6100 Datasheet, PDF (10/559 Pages) Texas Instruments – Stellaris® LM3S6100 Microcontroller

Table of Contents
Figure 12-4. Interface to an Ethernet Jack .............................................................................. 436
Figure 13-1. Analog Comparator Module Block Diagram ......................................................... 475
Figure 13-2. Structure of Comparator Unit .............................................................................. 476
Figure 13-3. Comparator Internal Reference Structure ............................................................ 477
Figure 14-1. 100-Pin LQFP Package Pin Diagram .................................................................. 487
Figure 14-2. 108-Ball BGA Package Pin Diagram (Top View) ................................................... 488
Figure 17-1. Load Conditions ................................................................................................ 516
Figure 17-2. JTAG Test Clock Input Timing ............................................................................. 518
Figure 17-3. JTAG Test Access Port (TAP) Timing .................................................................. 519
Figure 17-4. JTAG TRST Timing ............................................................................................ 519
Figure 17-5. External Reset Timing (RST) .............................................................................. 520
Figure 17-6. Power-On Reset Timing ..................................................................................... 520
Figure 17-7. Brown-Out Reset Timing .................................................................................... 520
Figure 17-8. Software Reset Timing ....................................................................................... 520
Figure 17-9. Watchdog Reset Timing ..................................................................................... 521
Figure 17-10. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing
Measurement .................................................................................................... 522
Figure 17-11. SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ................. 522
Figure 17-12. SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ..................................... 523
Figure 17-13. External XTLP Oscillator Characteristics ............................................................. 525
Figure D-1. Stellaris LM3S6100 100-Pin LQFP Package Dimensions ..................................... 551
Figure D-2. 100-Pin LQFP Tray Dimensions .......................................................................... 553
Figure D-3. 100-Pin LQFP Tape and Reel Dimensions ........................................................... 554
Figure D-4. Stellaris LM3S6100 108-Ball BGA Package Dimensions ...................................... 555
Figure D-5. 108-Ball BGA Tray Dimensions ........................................................................... 557
Figure D-6. 108-Ball BGA Tape and Reel Dimensions ............................................................ 558
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June 18, 2012
Texas Instruments-Production Data