LM3S6100 Datasheet, PDF (17/559 Pages) Texas Instruments – Stellaris® LM3S6100 Microcontroller

Stellaris^® LM3S6100 Microcontroller
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
Register 31:
Register 32:
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 272
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 273
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 275
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 276
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 277
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 278
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 279
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 280
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 281
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 282
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 283
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 284
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 285
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 286
General-Purpose Timers ............................................................................................................. 287
Register 1: GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 299
Register 2: GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 300
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 302
Register 4: GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 304
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 307
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 309
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 310
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 311
Register 9: GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 313
Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 314
Register 11: GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 315
Register 12: GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 316
Register 13: GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 317
Register 14: GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 318
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 319
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 320
Register 17: GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 321
Register 18: GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 322
Watchdog Timer ........................................................................................................................... 323
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 327
Register 2: Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 328
Register 3: Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 329
Register 4: Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 330
Register 5: Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 331
Register 6: Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 332
Register 7: Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 333
Register 8: Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 334
Register 9: Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 335
Register 10: Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 336
Register 11: Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 337
Register 12: Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 338
Register 13: Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 339
Register 14: Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 340
June 18, 2012
17
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