LM3S6100 Datasheet, PDF (506/559 Pages) Texas Instruments – Stellaris® LM3S6100 Microcontroller

Signal Tables
Table 15-6. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
VDD33
E10
-
Power Positive supply for I/O and some logic.
G10
G11
G12
H10
K7
K8
K9
VDDA
C6
-
Power The positive supply for the analog circuits (ADC, Analog
C7
Comparators, etc.). These are separated from VDD to
minimize the electrical noise contained on VDD from affecting
the analog functions. VDDA pins must be supplied with a
voltage that meets the specification in “Recommended DC
Operating Conditions” on page 513, regardless of system
implementation.
XTALNPHY
J1
O
TTL
Ethernet PHY XTALN 25-MHz oscillator crystal output.
Connect this pin to ground when using a single-ended 25-MHz
clock input connected to the XTALPPHY pin.
XTALPPHY
J2
I
TTL
Ethernet PHY XTALP 25-MHz oscillator crystal input or
external clock reference input.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
15.2.3 Signals by Function, Except for GPIO
Table 15-7. Signals by Function, Except for GPIO
Function
Pin Name
C0+
Analog Comparators C0-
C0o
Pin Number
A7
A6
B7
Pin Type
I
I
O
Buffer Type^a
Description
Analog Analog comparator 0 positive input.
Analog Analog comparator 0 negative input.
TTL
Analog comparator 0 output.
506
June 18, 2012
Texas Instruments-Production Data