LM3S6100 Datasheet, PDF (453/559 Pages) Texas Instruments – Stellaris® LM3S6100 Microcontroller

Stellaris^® LM3S6100 Microcontroller
Register 11: Ethernet MAC Management Transmit Data (MACMTXD), offset
0x02C
This register holds the next value to be written to the MII Management registers.
Ethernet MAC Management Transmit Data (MACMTXD)
Base 0x4004.8000
Offset 0x02C
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
MDTX
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:16
15:0
Name
reserved
MDTX
Type
RO
R/W
Reset
0x0000
0x0000
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
MII Register Transmit Data
The MDTX bits represent the data that will be written in the next MII
management transaction.
June 18, 2012
453
Texas Instruments-Production Data