DS125RT410_15 Datasheet, PDF (6/58 Pages) Texas Instruments – Low-Power Multi-Rate Quad Channel Retimer

DS125RT410
SNLS459A – APRIL 2013 – REVISED OCTOBER 2015
www.ti.com
6.5 Electrical Characteristics
over recommended operating supply and temperature ranges with default register settings unless otherwise specified⁽¹⁾
PARAMETER
TEST CONDITIONS
MIN TYP
MAX UNIT
POWER
PD
Power supply consumption
Average power consumption⁽²⁾
Max transient power supply current⁽³⁾
660
mW
500
610 mA
NT_PS
Supply noise tolerance⁽⁴⁾
2.5-V LVCMOS DC SPECIFICATIONS
50 Hz to 100 Hz
100 Hz to 10 MHz
10 MHz to 5.0 GHz
100
mV_P-P
40
mV_P-P
10
mV_P-P
High level input voltage
V_IH
High level (ADDR[3:0] pins)
Low level input voltage
V_IL
Low level input voltage (ADDR[3:0] pins)
1.75
2.28
GND
GND
V_DD
V
V_DD
V
0.7
V
0.335
V
V_OH
High level output voltage
V_OL
Low level output voltage
I_IN
Input leakage current
I_IH
Input high current (EN_SMB pin)
I_IL
Input low current (EN_SMB pin)
3.3-V LVCMOS DC SPECIFICATIONS (SDA, SDC, INT)
I_OH = –3 mA
I_OL = 3 mA
V_IN = V_DD
V_IN = GND
V_IN = V_DD
V_IN = GND
2.0
–10
55
–110
V
0.4
V
10
μA
μA
μA
μA
V_IH
High level input voltage
V_IL
Low level input voltage
V_OL
Low level output voltage
I_IH
Input high current
I_IL
Input low current
f_SDC
SMBus clock rate
V_DD = 2.5 V
V_DD = 2.5 V
I_PULLUP = 3 mA
V_IN = 3.6 V, V_DD = 2.5 V
V_IN = GND, V_DD = 2.5 V
Slave Mode
Master Mode⁽⁵⁾
1.75
GND
20
–10
100
400
3.6
V
0.7
V
0.4
V
40
μA
10
μA
400 kHz
kHz
DATA BIT RATES
R_B
Bit rate range
SIGNAL DETECT
9.8
12.5 Gbps
SDH
Signal detect ON threshold level
Default input signal level to assert signal detect,
10.3125 Gbps, PRBS-31
70
mV_p-p
SDL
Signal detect OFF threshold level
Default input signal level to de-assert signal detect,
10.3125 Gbps, PRBS-31
10
mV_p-p
RECEIVER INPUTS (RXPn, RXNn)
V_{TX2, min}
V_{TX2, max}
V_{TX1, max}
V_{TX0, max}
L_RI
Minimum source transmit launch signal
level (IN, diff)
Maximum differential input return loss -
|SDD11|
See ⁽⁶⁾
See ⁽⁷⁾
See ⁽⁸⁾
100 MHz to 6 GHz
600
1000
1200
1600
–15
mV_P-P
mV_P-P
mV_P-P
mV_P-P
dB
Z_D
Differential input impedance
Z_S
Single-ended input impedance
100 MHz to 6 GHz
100 MHz to 6 GHz
100
Ω
50
Ω
(1) Typical values represent most likely parametric norms at V_DD = 2.5 V, T_A = 25°C, and at the Recommended Operation Conditions at the
time of product characterization.
(2) V_DD = 2.5 V, T_A = 25°C. All four channels active and locked.
(3) Max momentary power supply current lasting less than 1s. The retimer may consume more power than the maximum average power
rating during the time required to acquire CDR lock.
(4) Allowed supply noise (mV_P-P sine wave) under typical conditions.
(5) EEPROM device used for Master mode programming must support f_SDC greater than 400 kHz.
(6) Differential signal amplitude at the transmitter output providing < 1 x 10^–12 bit error rate. Measured at 10.3125 Gbps with a PRBS-31
data pattern. Input transmission channel is 40-inch long FR-4 stripline, 4-mil trace width.
(7) Differential signal amplitude at the transmitter output providing < 1 x 10^–12 bit error rate. Measured at 10.3125 Gbps with a PRBS-31
data pattern. Input transmission channel is 30-inch long FR-4 stripline, 4-mil trace width.
(8) Differential signal amplitude at the transmitter output providing < 1 x 10^–12 bit error rate. Measured at 10.3125 Gbps with a PRBS-31
data pattern. No input transmission channel.
6
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