DS125RT410_15 Datasheet, PDF (27/58 Pages) Texas Instruments – Low-Power Multi-Rate Quad Channel Retimer

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DS125RT410
SNLS459A – APRIL 2013 – REVISED OCTOBER 2015
In all eye opening monitor modes, the amount of time during which the eye opening monitor accumulates eye
opening data can be set by the value of register 0x2a. In general, the greater this value the longer the
accumulation time. When this value is set to its maximum possible value of 0xff, the maximum number of
samples acquired at each phase and amplitude offset is approximately 2¹⁸. Even with this setting, the eye
opening monitor values can be read from the SMBus with no delay. The eye opening monitor operation is
sufficiently fast that the SMBus read operation cannot outrun it.
The eye opening is measured at the input to the data comparator. At this point in the data path, a significant
amount of gain has been applied to the signal by the CTLE. In many cases, the vertical eye opening as
measured by the EOM will be on the order of 400- to 500-mV peak-to-peak. The secondary comparator, which is
used to measure the eye opening, has an adjustable voltage range from ±100 mV to ±400 mV. The EOM voltage
range is normally set by the CDR state machine during lock and adaptation, but the range can be overridden by
setting bit 6 to 0 of register 0x2C, so the voltage range can scale with the values in register 0x11, bits [7:6]. The
values of this code and the corresponding EOM voltage ranges are listed in Table 8.
Table 8. EOM Voltage Range vs Bits 7:6 of Register 0x11
VALUE in BITS 7:6 of REGISTER 0x11
0x0
0x1
0x2
0x3
EOM VOLTAGE RANGE (± mV)
±100
±200
±300
±400
Note that the voltage ranges listed in Table 8 are the voltage ranges of the signal at the input to the data path
comparator. These values are not directly equivalent to any observable voltage measurements at the input to the
DS125RT410 . Note also that if the EOM voltage range is set too small the voltage sweep of the secondary
comparator may not be sufficient to capture the vertical eye opening. When this happens the eye boundaries will
be outside the vertical voltage range of the eye measurement.
To summarize, the following procedure is for reading the eye monitor data from the DS125RT410:
1. Select the DS125RT410 channel to be used for the eye monitor measurement by writing the channel select
register, register 0xff, with the appropriate value as listed in Table 14. if the correct channel register set is
already selected, this step may be skipped.
2. Disable the HEO and VEO lock monitoring function by writing a 0 to bit 7 of register 0x3e.
3. Select the eye monitor voltage range by setting bits 7:6 of register 0x11 according to the values in Table 8.
The CDR state machine will have set this range during lock acquisition, but it may be necessary to change it
to capture the entire vertical eye extent.
4. Power up the eye monitor circuitry by clearing bit 5 of register 0x11. Normally the eye monitor circuitry is
powered up periodically by the CDR state machine. Clearing bit 5 of register 0x11 enables the eye monitor
circuitry unconditionally. This bit should be set again once the eye acquisition is complete. Clearing bit 5 and
setting bits 7:6 of register 0x11 as desired can be combined into a single register write if desired.
5. Clear bit 7 of register 0x22. This is the eye monitor override bit. It is cleared by default, so you may not need
to change it.
6. Set bit 7 of register 0x24. This is the fast eye monitor enable bit.
7. Set bit 1 of register 0x24. This initiates the automatic fast eye monitor measurement. This bit can be set at
the same time a bit 7 of register 0x24 if desired.
8. Read the data array from the DS125RT410. This can be accomplished in two ways.
– If you are using multi-byte reads, address the DS125RT410 to read from register 0x25. Continue to read
from this register without addressing the device again until you have read all the data desired. The
read operation can be interrupted by addressing the device again and then resumed by reading once
again from register 0x25.
– If you are not using multi-byte reads, then read the MSB for each phase and amplitude offset setting from
register 0x25 and the LSB for each setting from register 0x26. In this mode, you address the device each
time you want to read a new byte.
9. In either mode, the first four bytes do not contain valid data. These should be discarded.
10. Continue reading eye monitor data until you have read the entire 64 X 64 array.
11. Clear bit 7 of register 0x24. This disables fast eye monitor mode.
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