DS125RT410_15 Datasheet, PDF (14/58 Pages) Texas Instruments – Low-Power Multi-Rate Quad Channel Retimer

DS125RT410
SNLS459A – APRIL 2013 – REVISED OCTOBER 2015
www.ti.com
Table 1. DS125RT410 SMBus Write Address Assignment (continued)
ADDR_3 ADDR_2 ADDR_1 ADDR_0
1
1
0
1
1
1
1
0
1
1
1
1
SMBus
WRITE
ADDRESS
0x4a
0x4c
0x4e
SEVEN-BIT
SMBus
ADDRESS
0x25
0x26
0x27
Once the DS125RT410 has latched in its SMBus address, its registers can be read and written using the two
pins of the SMBus interface, serial data (SDA) and serial data clock (SDC).
7.4.3 SDA and SDC
In both SMBus master and SMBus slave mode, the DS125RT410 is configured using the SMBus. The SMBus
consists of two lines, the SDA or serial data line (pin 18) and the SDC or serial clock line (pin 17). In the
DS125RT410 these pins are 3.3-V tolerant. The SDA and SDC lines are both open-drain. They require a pullup
resistor to a supply voltage, which may be either 2.5 V or 3.3 V. A pullup resistor in the 2-kΩ to 5-kΩ range will
provide reliable SMBus operation.
The SMBus is a standard communications bus for configuring simple systems. For a specification of the SMBus
an description of its operation, see smbus.org/specs/.
7.4.4 Standards-Based Modes
The DS125RT410 is designed to automatically operate with various multi-band data standards.
The first set of register writes constrain the coarse VCO tuning and the VCO divider ratios. When these registers
are set as indicated in Table 2, the DS125RT410 restricts its coarse VCO tuning to a set of coarse tuning values.
It also restricts the VCO divider ratio to the set of divider ratios required to cover the frequency bands for the
desired data rate standard. This enables the DS125RT410 to acquire phase lock more quickly than would be
possible if the coarse tuning range were unrestricted.
STANDARDS
InfiniBand
CPRI1
CPRI2
PROP3
Interlaken1
Interlaken2
Ethernet
Table 2. Standards-Based Modes Register Settings
DATA
RATES
(Gb/s)
VCO
FREQUENCIES
(GHz)
2.5, 5, 10
10.0
2.4576, 4.9152, 9.8304 9.8304
3.072, 6.144
12.288
6.25
12.5
3.125, 6.25
12.5
10.3125
10.3125
1.25, 10.3125
10.0, 10.3125
DIVIDER
RATIOS
1, 2, 4
1, 2, 4
2, 4
2
2, 4
1
1, 8
REGISTER 0x2F
VALUE (hex)
0x26
0x36
0x46
0xA6
0xB6
0xC6
0xF6
As an example of the usage of the registers in Table 2, assume that the retimer is required to operate in 10-GbE
or 1-GbE mode. By setting register 0x2f, bits 7:4, to 4'b1111, the DS125RT410 will automatically set its divider
ratio and its coarse VCO tuning setting to lock to either a 10-GbE signal (at 10.3125 Gb/s) or a 1-GbE signal (at
1.25 Gb/s) at its input.
For some standards listed in Table 2, the required VCO frequency is the same for each data rate in the standard.
Only the divider ratios are different. The retimer can automatically switch between the required divider ratios with
a single set of register settings.
For other data rates, it is also necessary to set the expected PPM count and the PPM count tolerance. These are
the values the retimer uses to detect a valid frequency lock.
14
Submit Documentation Feedback
Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: DS125RT410