DS125RT410_15 Datasheet, PDF (38/58 Pages) Texas Instruments – Low-Power Multi-Rate Quad Channel Retimer

DS125RT410
SNLS459A – APRIL 2013 – REVISED OCTOBER 2015
www.ti.com
Table 15. Channel Registers (continued)
ADDRESS
(HEX)
18
BITS
7
6
5
4
DEFAULT
VALUE
(Hex)
0
1
0
0
MODE
RW
RW
RW
RW
EEPROM
FIELD NAME
N
RESERVED
Y
PDIQ_SEL_DIV2
Y
PDIQ_SEL_DIV1
Y
PDIQ_SEL_DIV0
3
0
RW
N
RESERVED
2
0
RW
N
DRV_SEL_SLOW
1:0
0
RW
N
RESERVED
19
7:6
0x23
RW
N
RESERVED
5:0
RW
Y
RESERVED
1A
7:4
0x0
RW
Y
RESERVED
3:0
0x0
RW
N
RESERVED
1B
7:2
0
RW
N
RESERVED
1
1
RW
Y
CP_EN_CP_PD
0
1
RW
Y
CP_EN_CP_FD
1C
7
0
RW
Y
EN_IDAC_PD_CP2
6
0
RW
Y
EN_IDAC_PD_CP1
5
1
RW
Y
EN_IDAC_PD_CP0
4
0
RW
Y
EN_IDAC_FD_CP2
3
0
RW
Y
EN_IDAC_FD_CP1
2
1
RW
Y
EN_IDAC_FD_CP0
1:0
0
RW
Y
RESERVED
1D
7
0
RW
Y
SBT_EN
6:0
0
RW
N
RESERVED
1E
7
1
RW
Y
PFD_SEL_DATA_MUX2
6
1
RW
Y
PFD_SEL_DATA_MUX1
5
1
RW
Y
PFD_SEL_DATA_MUX0
4
3
2
1
0
1F
7
6
5
4
3
2
1
0
0
RW
N
PRBS_EN
1
RW
Y
RESERVED
0
RW
Y
PFD_PD_PD
0
RW
Y
PFD_EN_FLD
1
RW
Y
PFD_EN_FD
0
RW
Y
RESERVED
1
RW
Y
LPF_EN_150
0
RW
N
RESERVED
1
RW
N
lpf_dac_val[4]
0
RW
N
lpf_dac_val[3]
1
RW
N
lpf_dac_val[2]
0
RW
N
lpf_dac_val[1]
1
RW
N
lpf_dac_val[0]
DESCRIPTION
These bits will force the divider setting if 0x09[2] is set.
000: Divide by 1
001: Divide by 2
010: Divide by 4
011: Divide by 8
100: Divide by 16
All other values are reserved.
1: Normal operation (phase detector charge pump enabled)
1: Normal operation (frequency detector charge pump enabled)
Phase detector charge pump setting. MSB located in channel
register 0x0C[0]. Override bit required for these bits to take effect
Frequency detector charge pump setting. MSB located in channel
register 0x0C[1]. Override bit required for these bits to take effect
SBT enable override
0: Normal operation
For these values to take effect, register 0x09[5] must be set to 1.
000: Raw Data*
001: Retimed Data
100: Pattern Generator
111: Mute
All other values are reserved.
1: Enable PRBS Generator
PFD phase detector power down override
PFD enable FLD override
PFD enable frequency detector override
When reg_0A[4]=1, this bit will change the loop filter resistance.
1 - 1500 Ω
0 - 750 Ω
lpf_dac_val over-ride
lpf_dac_val over-ride
lpf_dac_val over-ride
lpf_dac_val over-ride
lpf_dac_val over-ride
38
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