DS125RT410_15 Datasheet, PDF (13/58 Pages) Texas Instruments – Low-Power Multi-Rate Quad Channel Retimer

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DS125RT410
SNLS459A – APRIL 2013 – REVISED OCTOBER 2015
Device Functional Modes (continued)
In SMBus master mode after the DS125RT410 has finished reading its initial configuration from the external
EEPROM it reverts to SMBus slave mode. In either mode the SMBus data and clock lines, SDA and SDC, are
used. Also, in either mode, the SMBus address is latched in on the address strap lines on power-up. In SMBus
slave mode, if the READ_EN pin is not tied low, the DS125RT410 will not latch in the address on its address
strap lines. It will instead latch in an SMBus write address of 0x30 regardless of the state of the address strap
lines. This is a test feature. Obviously a system with multiple retimers cannot operate properly if all the retimers
are responding to the same SMBus address. Tie the READ_EN pin low when operating in SMBus slave mode to
avoid this condition.
The DS125RT410 reads its SMBus address upon power-up from the SMBus address lines.
7.4.2 Address Lines <ADDR_[3:0]>
In either SMBus master or SMBus slave mode the DS125RT410 must be assigned an SMBus address. A unique
address should be assigned to each device on the SMBus.
The SMBus address is latched into the DS125RT410 on power-up. The address is read in from the state of the
<AD3:AD0> lines (pins 16, 21, 40, and 45 respectively) upon power-up. In either SMBus mode these address
lines are input pins on power-up.
The DS125RT410 can be configured with any of 16 SMBus addresses. The SMBus addressing scheme uses the
least-significant bit of the SMBus address as the Read/Write_N address bit. When an SMBus device is
addressed for writing, this bit is set to 0; for reading, to 1. Table 1 lists the write address setting for the
DS125RT410 versus the values latched in on the address lines at power-up.
The address byte sent by the SMBus master over the SMBus is always 8 bits long. The least-significant bit
indicates whether the address is for a write operation, in which the master will output data to the SMBus to be
read by the slave, or a read operation, in which the slave will output data to the SMBus to be read by the master.
if the least-significant bit is a 0, the address is for a write operation. If it is a 1, the address is for a read
operation. Accordingly, SMBus addresses are sometimes referred to as seven-bit addresses. To produce the
write address for the SMBus, the seven-bit address is left-shifted by one bit. To produce the read address, it is
left shifted by one bit and the least-significant bit is set to 1. Table 1 lists the seven-bit addresses corresponding
to each set of address line values.
When the DS125RT410 is used in SMBus slave mode, the READ_EN pin must be tied low. If it is tied high or
floating, the DS125RT410 will not latch in its address from the address lines on power-up. When the READ_EN
pin is tied high in SMBus slave mode (that is, when the EN_SMB pin (pin 20) is tied high), the DS125RT410 will
revert to an SMBus write address of 0x30. This is a test feature. If there are multiple DS125RT410 devices on
the same SMBus, they will all revert to an SMBus write address of 0x30, which can cause SMBus collisions and
failure to access the DS125RT410 devices over the SMBus.
ADDR_3
0
0
0
0
0
0
0
0
1
1
1
1
1
Table 1. DS125RT410 SMBus Write Address Assignment
ADDR_2 ADDR_1 ADDR_0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
SMBus
WRITE
ADDRESS
0x30
0x32
0x34
0x36
0x38
0x3a
0x3c
0x3e
0x40
0x42
0x44
0x46
0x48
SEVEN-BIT
SMBus
ADDRESS
0x18
0x19
0x1a
0x1b
0x1c
0x1d
0x1e
0x1f
0x20
0x21
0x22
0x23
0x24
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