DS125RT410_15 Datasheet, PDF (31/58 Pages) Texas Instruments – Low-Power Multi-Rate Quad Channel Retimer

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DS125RT410
SNLS459A – APRIL 2013 – REVISED OCTOBER 2015
Register (Hex)
54
55
56
57
58
59
5A
5B
5C
5D
5E
5F
Table 10. CTLE Settings for Adaptation (continued)
Bits 7:6 (CTLE
Stage 0)
1
2
2
3
1
1
1
1
3
2
2
2
Bits 5:4 (CTLE
Stage 1)
1
0
3
0
1
1
2
3
1
1
1
2
Bits 3:2 (CTLE
Stage 2)
0
3
0
2
1
3
2
1
1
2
1
1
Bits 1:0 (CTLE
Stage 3)
2
0
0
0
3
1
1
1
1
1
2
1
CTLE Boost
String
1102
2030
2300
3020
1113
1131
1221
1311
3111
2121
2112
2211
CTLE Adaptation
Index
20
21
22
23
24
25
26
27
28
29
30
31
As an alternative to, or in conjunction with, writing the CTLE boost setting registers 0x40 through 0x5f, it is
possible to set the starting CTLE boost setting index. To override the default setting, which is 0, set bit 3 of
register 0x2f. When this bit is set, the starting index for adaptation comes from register 0x39, bits 4:0. This is the
index into the CTLE settings table in registers 0x40 through 0x5f. When this starting index is 0, which is the
default, CTLE adaptation starts at the first setting in the table, the one in register 0x40, and continues until the
optimum FOM is reached.
7.5.22 Setting the Output Differential Voltage
Register 0x2d, bits 2:0
There are eight levels of output differential voltage available in the DS125RT410, from 0.6 V to 1.3 V in 0.1 V
increments. The values drv_sel_vod[2:0] in bits 2:0 of register 0x2d set the output VOD. The available VOD
settings and the corresponding values of this bit field are listed in Table 11.
Bit 2, drv_sel_vod[2]
0
0
0
0
1
1
1
1
Table 11. VOD Settings
Bit 1, drv_sel_vod[1]
Bit 0, drv_sel_vod[0]
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
Selected VOD (V, peak-to-peak,
differential)
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
7.5.23 Setting the Output De-Emphasis Setting
Register 0x15, bits 2:0 and bit 6
Fifteen output de-emphasis settings are available in the DS125RT410, ranging from 0 dB to –15 dB. The de-
emphasis values come from register 0x15, bits 2:0, which make up the bit field dvr_dem<2:0>, and register 0x15,
bit 6, which is the third de-emphasis setting bit.
The available driver de-emphasis settings and the mapping to these bits are listed in Table 12.
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