DS125RT410_15 Datasheet, PDF (48/58 Pages) Texas Instruments – Low-Power Multi-Rate Quad Channel Retimer

DS125RT410
SNLS459A – APRIL 2013 – REVISED OCTOBER 2015
8 Application and Implementation
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NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The DS125RT410 is a 4-channel retimer that supports many different data rates and application spaces.
The following sections describe the typical use cases and common implementation practices.
8.2 Typical Application
Figure 6 shows a typical system implementation, where the DS125RT410 is used both on the backplane and port
side.
Switch Fabric
Line Card
DS125DF410
Optical Modules
x4
ASIC
x4
x4
10GbE
CPRI
SFP+ (SFF8431)
ASIC
Interlaken
QSFP
Others
Back
Plane/
Mid
Plane
x4
DS125DF410
Passive Copper
Clean Signal
Noisy Signal
Figure 6. Typical Application Diagram
8.2.1 Design Requirements
This section lists some critical areas for high speed printed circuit board design consideration and study.
• Use 100-Ω differential impedance traces.
• Back-drill connector vias and signal vias to minimize stub length.
• Use reference plane vias to ensure a low inductance path for the return current.
• Place AC-coupling capacitors for the transmitter links near the receiver for that channel.
• The maximum body size for AC-coupling capacitors is 0402.
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