LM3S6611 Datasheet, PDF (582/647 Pages) List of Unclassifed Manufacturers – Microcontroller

Signal Tables
Table 17-6. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
GND
B6
-
Power Ground reference for logic and I/O pins.
C4
C5
F10
F11
F12
H3
J3
J10
K5
K6
K10
L10
GNDA
A5
-
Power The ground reference for the analog circuits ( Analog
B5
Comparators, etc.). These are separated from GND to
minimize the electrical noise contained on VDD from affecting
the analog functions.
GNDPHY
C8
-
Power GND of the Ethernet PHY.
C9
K4
HIB
I2C0SCL
I2C0SDA
I2C1SCL
I2C1SDA
M12
O
C11
I/O
C12
I/O
L6
I/O
M6
I/O
OD
An open-drain output with internal pull-up that indicates the
processor is in Hibernate mode.
OD
I²C module 0 clock.
OD
I²C module 0 data.
OD
I²C module 1 clock.
OD
I²C module 1 data.
LDO
E3
-
Power Low drop-out regulator output voltage. This pin requires an
external capacitor between the pin and GND of 1 µF or
greater. The LDO pin must also be connected to the VDD25
pins at the board level in addition to the decoupling
capacitor(s).
LED0
J12
O
TTL
Ethernet LED 0.
LED1
J11
O
TTL
Ethernet LED 1.
MDIO
L9
I/O
TTL
MDIO of the Ethernet PHY.
NC
A1
-
-
No connect. Leave the pin electrically unconnected/isolated.
A2
A3
A4
B1
B2
B3
B4
OSC0
L11
I
Analog Main oscillator crystal input or an external clock reference
input.
OSC1
M11
O
Analog Main oscillator crystal output. Leave unconnected when using
a single-ended clock source.
PA0
L3
I/O
TTL
GPIO port A bit 0.
PA1
M3
I/O
TTL
GPIO port A bit 1.
PA2
M4
I/O
TTL
GPIO port A bit 2.
PA3
L4
I/O
TTL
GPIO port A bit 3.
PA4
L5
I/O
TTL
GPIO port A bit 4.
582
July 16, 2014
Texas Instruments-Production Data