LM3S6611 Datasheet, PDF (12/647 Pages) List of Unclassifed Manufacturers – Microcontroller

Table of Contents
List of Tables
Table 1.
Table 2.
Table 2-1.
Table 2-2.
Table 2-3.
Table 2-4.
Table 2-5.
Table 2-6.
Table 2-7.
Table 2-8.
Table 2-9.
Table 2-10.
Table 2-11.
Table 2-12.
Table 2-13.
Table 3-1.
Table 3-2.
Table 3-3.
Table 3-4.
Table 3-5.
Table 3-6.
Table 3-7.
Table 3-8.
Table 3-9.
Table 4-1.
Table 4-2.
Table 4-3.
Table 4-4.
Table 5-1.
Table 5-2.
Table 5-3.
Table 5-4.
Table 5-5.
Table 5-6.
Table 5-7.
Table 5-8.
Table 6-1.
Table 6-2.
Table 6-3.
Table 7-1.
Table 7-2.
Table 7-3.
Table 8-1.
Table 8-2.
Table 8-3.
Table 8-4.
Revision History .................................................................................................. 22
Documentation Conventions ................................................................................ 29
Summary of Processor Mode, Privilege Level, and Stack Use ................................ 51
Processor Register Map ....................................................................................... 52
PSR Register Combinations ................................................................................. 57
Memory Map ....................................................................................................... 65
Memory Access Behavior ..................................................................................... 67
SRAM Memory Bit-Banding Regions .................................................................... 69
Peripheral Memory Bit-Banding Regions ............................................................... 70
Exception Types .................................................................................................. 75
Interrupts ............................................................................................................ 76
Exception Return Behavior ................................................................................... 81
Faults ................................................................................................................. 82
Fault Status and Fault Address Registers .............................................................. 83
Cortex-M3 Instruction Summary ........................................................................... 85
Core Peripheral Register Regions ......................................................................... 88
Memory Attributes Summary ................................................................................ 91
TEX, S, C, and B Bit Field Encoding ..................................................................... 94
Cache Policy for Memory Attribute Encoding ......................................................... 95
AP Bit Field Encoding .......................................................................................... 95
Memory Region Attributes for Stellaris Microcontrollers .......................................... 95
Peripherals Register Map ..................................................................................... 96
Interrupt Priority Levels ...................................................................................... 121
Example SIZE Field Values ................................................................................ 149
JTAG_SWD_SWO Signals (100LQFP) ................................................................ 153
JTAG_SWD_SWO Signals (108BGA) ................................................................. 154
JTAG Port Pins Reset State ............................................................................... 154
JTAG Instruction Register Commands ................................................................. 161
System Control & Clocks Signals (100LQFP) ...................................................... 165
System Control & Clocks Signals (108BGA) ........................................................ 165
Reset Sources ................................................................................................... 166
Clock Source Options ........................................................................................ 172
Possible System Clock Frequencies Using the SYSDIV Field ............................... 174
Examples of Possible System Clock Frequencies Using the SYSDIV2 Field .......... 174
System Control Register Map ............................................................................. 178
RCC2 Fields that Override RCC fields ................................................................. 192
Hibernate Signals (100LQFP) ............................................................................. 230
Hibernate Signals (108BGA) .............................................................................. 231
Hibernation Module Register Map ....................................................................... 237
Flash Protection Policy Combinations ................................................................. 251
User-Programmable Flash Memory Resident Registers ....................................... 255
Flash Register Map ............................................................................................ 255
GPIO Pins With Non-Zero Reset Values .............................................................. 278
GPIO Pins and Alternate Functions (100LQFP) ................................................... 278
GPIO Pins and Alternate Functions (108BGA) ..................................................... 279
GPIO Signals (100LQFP) ................................................................................... 280
12
July 16, 2014
Texas Instruments-Production Data