LM3S6611 Datasheet, PDF (286/647 Pages) List of Unclassifed Manufacturers – Microcontroller

General-Purpose Input/Outputs (GPIOs)
be used to sink current loads up to 18 mA each. At 18-mA sink current loading, the V_OL value is
specified as 1.2 V. The high-current GPIO package pins must be selected such that there are only
a maximum of two per side of the physical package or BGA pin group with the total number of
high-current GPIO outputs not exceeding four for the entire package.
8.2.6
Identification
The identification registers configured at reset allow software to detect and identify the module as
a GPIO block. The identification registers include the GPIOPeriphID0-GPIOPeriphID7 registers as
well as the GPIOPCellID0-GPIOPCellID3 registers.
8.3 Initialization and Configuration
To use the GPIO, the peripheral clock must be enabled by setting the appropriate GPIO Port bit
field (GPIOn) in the RCGC2 register.
On reset, all GPIO pins (except for the five JTAG pins) are configured out of reset to be undriven
(tristate): GPIOAFSEL=0, GPIODEN=0, GPIOPDR=0, and GPIOPUR=0. Table 8-6 on page 286
shows all possible configurations of the GPIO pads and the control register settings required to
achieve them. Table 8-7 on page 287 shows how a rising edge interrupt would be configured for pin
2 of a GPIO port.
Table 8-6. GPIO Pad Configuration Examples
Configuration
GPIO Register Bit Value^a
AFSEL DIR
ODR
Digital Input (GPIO)
0
0
0
Digital Output (GPIO)
0
1
0
Open Drain Output
0
1
1
(GPIO)
Open Drain
1
X
1
Input/Output (I²C)
DEN
1
1
1
1
Digital Input (Timer
1
X
0
1
CCP)
Digital Output (Timer
1
X
0
1
PWM)
Digital Input/Output
1
X
0
1
(SSI)
Digital Input/Output
1
X
0
1
(UART)
Analog Input
(Comparator)
0
0
0
0
Digital Output
(Comparator)
1
X
0
1
a. X=Ignored (don’t care bit)
?=Can be either 0 or 1, depending on the configuration
PUR
?
?
X
X
?
?
?
?
0
?
PDR
?
?
X
X
?
?
?
?
0
?
DR2R
X
?
?
?
X
?
?
?
X
?
DR4R
X
?
?
?
X
?
?
?
X
?
DR8R
X
?
?
?
X
?
?
?
X
?
SLR
X
?
?
?
X
?
?
?
X
?
286
July 16, 2014
Texas Instruments-Production Data