LM3S6611 Datasheet, PDF (516/647 Pages) List of Unclassifed Manufacturers – Microcontroller

Ethernet Controller
Bit/Field
2
1
0
Name
TXEMP
TXER
RXINT
Type
W1C
W1C
W1C
Reset
0
0
0
Description
Clear Transmit FIFO Empty
Setting this bit clears the TXEMP interrupt in the MACRIS register.
Clear Transmit Error
Setting this bit clears the TXER interrupt in the MACRIS register and
resets the TX FIFO write pointer.
Clear Packet Received
Setting this bit clears the RXINT interrupt in the MACRIS register.
516
July 16, 2014
Texas Instruments-Production Data