LM3S6611 Datasheet, PDF (36/647 Pages) List of Unclassifed Manufacturers – Microcontroller

Architectural Overview
– Two SSI modules, each with the following features:
– Master or slave operation
– Programmable clock bit rate and prescale
– Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
– Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments
synchronous serial interfaces
– Programmable data frame size from 4 to 16 bits
– Internal loopback test mode for diagnostic/debug testing
■ I²C
– Two I²C modules, each with the following features:
– Devices on the I²C bus can be designated as either a master or a slave
• Supports both sending and receiving data as either a master or a slave
• Supports simultaneous master and slave operation
– Four I²C modes
• Master transmit
• Master receive
• Slave transmit
• Slave receive
– Two transmission speeds: Standard (100 Kbps) and Fast (400 Kbps)
– Master and slave interrupt generation
• Master generates interrupts when a transmit or receive operation completes (or aborts
due to an error)
• Slave generates interrupts when data has been sent or requested by a master
– Master with arbitration and clock synchronization, multimaster support, and 7-bit addressing
mode
■ 10/100 Ethernet Controller
– Conforms to the IEEE 802.3-2002 specification
• 10BASE-T/100BASE-TX IEEE-802.3 compliant. Requires only a dual 1:1 isolation
transformer interface to the line
• 10BASE-T/100BASE-TX ENDEC, 100BASE-TX scrambler/descrambler
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July 16, 2014
Texas Instruments-Production Data