LM3S6611 Datasheet, PDF (542/647 Pages) List of Unclassifed Manufacturers – Microcontroller

Ethernet Controller
Register 22: Ethernet PHY Management Register 16 – Vendor-Specific (MR16),
address 0x10
This register enables software to configure the operation of vendor-specific modes of the Ethernet
Controller.
Ethernet PHY Management Register 16 – Vendor-Specific (MR16)
Base 0x4004.8000
Address 0x10
Type R/W, reset 0x0140
15
14
13
12
11
10
9
8
7
RPTR INPOL reserved TXHIM SQEI NL10
reserved
Type R/W
R/W0
RO
R/W
R/W
R/W
RO
RO
RO
Reset
0
0
0
0
0
0
0
1
0
6
5
4
3
2
1
0
APOL RVSPOL
reserved
PCSBP RXCC
RO
R/W
R/W
RO
1
0
0
0
RO
R/W
R/W
0
0
0
Bit/Field
15
14
13
12
11
10
9:6
Name
RPTR
INPOL
reserved
TXHIM
SQEI
NL10
reserved
Type
R/W
R/W0
RO
R/W
R/W
R/W
RO
Reset
0
0
Description
Repeater Mode
When set, this bit enables the repeater mode of operation. In this mode,
full-duplex is not allowed and the Carrier Sense signal only responds
to receive activity.
Interrupt Polarity
Value Description
1 Sets the polarity of the PHY interrupt to be active High.
0 Sets the polarity of the PHY interrupt to active Low.
Important: ^{Because the Media Access Controller expects active}
Low interrupts from the PHY, this bit must always be
written with a 0 to ensure proper operation.
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
Transmit High Impedance Mode
When set, this bit enables the transmitter High Impedance mode. In this
mode, the TXOP and TXON transmitter pins are put into a high impedance
state. The RXIP and RXIN pins remain fully functional.
0
SQE Inhibit Testing
When set, this bit prohibits 10BASE-T SQE testing.
When clear, the SQE testing is performed by generating a collision pulse
following the completion of the transmission of a frame.
0
Natural Loopback Mode
When set, this bit enables the 10BASE-T Natural Loopback mode. In
this mode, the transmission data received by the Ethernet Controller is
looped back onto the receive data path when 10BASE-T mode is
enabled.
0x5
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
542
July 16, 2014
Texas Instruments-Production Data