LM3S6611 Datasheet, PDF(580/647 Page) List of Unclassifed Manufacturers – Microcontroller

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LM3S6611 Datasheet, PDF (580/647 Pages) List of Unclassifed Manufacturers – Microcontroller

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Signal Tables

Table 17-5. Signals by Pin Number (continued)

Pin Number

Pin Name

Pin Type Buffer Typea Description

PG1

I/O

TTL

GPIO port G bit 1.

K2

U2Tx

O

TTL

UART module 2 transmit. When in IrDA mode, this signal has IrDA

modulation.

K3

ERBIAS

I

Analog 12.4-kÎ© resistor (1% precision) used internally for Ethernet PHY.

K4

GNDPHY

-

Power GND of the Ethernet PHY.

K5

GND

-

Power Ground reference for logic and I/O pins.

K6

GND

-

Power Ground reference for logic and I/O pins.

K7

VDD33

-

Power Positive supply for I/O and some logic.

K8

VDD33

-

Power Positive supply for I/O and some logic.

K9

VDD33

-

Power Positive supply for I/O and some logic.

K10

GND

-

Power Ground reference for logic and I/O pins.

XOSC0

K11

I

Analog Hibernation module oscillator crystal input or an external clock

reference input. Note that this is either a crystal or a 32.768-kHz

oscillator for the Hibernation module RTC.

K12

XOSC1

O

Analog Hibernation module oscillator crystal output. Leave unconnected

when using a single-ended clock source.

PC4

I/O

TTL

GPIO port C bit 4.

L1

CCP5

I/O

TTL

Capture/Compare/PWM 5.

PC7

I/O

TTL

GPIO port C bit 7.

L2

CCP4

I/O

TTL

Capture/Compare/PWM 4.

PA0

I/O

TTL

GPIO port A bit 0.

L3

U0Rx

I

TTL

UART module 0 receive. When in IrDA mode, this signal has IrDA

modulation.

PA3

I/O

TTL

GPIO port A bit 3.

L4

SSI0Fss

I/O

TTL

SSI module 0 frame signal.

PA4

I/O

TTL

GPIO port A bit 4.

L5

SSI0Rx

I

TTL

SSI module 0 receive.

PA6

I/O

TTL

GPIO port A bit 6.

L6

I2C1SCL

I/O

OD

I2C module 1 clock.

L7

RXIN

I

Analog RXIN of the Ethernet PHY.

L8

TXON

O

Analog TXON of the Ethernet PHY.

L9

MDIO

I/O

TTL

MDIO of the Ethernet PHY.

L10

GND

-

Power Ground reference for logic and I/O pins.

L11

OSC0

I

Analog Main oscillator crystal input or an external clock reference input.

VBAT

L12

-

Power Power source for the Hibernation module. It is normally connected

to the positive terminal of a battery and serves as the battery

backup/Hibernation module power-source supply.

PC5

I/O

TTL

GPIO port C bit 5.

M1

C0o

O

TTL

Analog comparator 0 output.

C1+

I

Analog Analog comparator 1 positive input.

PC6

I/O

TTL

GPIO port C bit 6.

M2

CCP3

I/O

TTL

Capture/Compare/PWM 3.

580

July 16, 2014

Texas Instruments-Production Data

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