CC2510F16 Datasheet, PDF(58/244 Page) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller

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CC2510F16 Datasheet, PDF (58/244 Pages) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller

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4. Enable global interrupt by setting the

IEN0.EA=1

5. Begin the interrupt service routine at the

corresponding vector address of that

interrupt. See Table 39 for

addresses

CC2510Fx / CC2511Fx

Note: An interrupt must not be enabled

without having proper code located at the

corresponding interrupt vector address

Interrupt

Number

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

Description

RF TX done / RX ready

ADC end of conversion

USART0 RX complete

USART1 RX complete

(Note: I2S RX complete, see Table

40)

AES encryption/decryption

complete

Sleep Timer compare

Port 2 inputs

(Note: Also used for USB on

CC2511Fx,, see Table 40)

USART0 TX complete

DMA transfer complete

Timer 1 (16-bit)

capture/Compare/overflow

Timer 2 (MAC Timer) overflow

Timer 3 (8-bit) compare/overflow

Timer 4 (8-bit) compare/overflow

Port 0 inputs

(Note: P0_7 interrupt used for USB

Resume interrupt on CC2511Fx)

USART1 TX complete

(Note: I2S TX complete, see Table

40)

Port 1 inputs

RF general interrupts

Watchdog overflow in timer mode

Interrupt

Name

RFTXRX

ADC

URX0

URX1

Interrupt

Vector

0x03

0x0B

0x13

0x1B

ENC

ST

P2INT

0x23

0x2B

0x33

UTX0

DMA

T1

T2

T3

T4

P0INT

0x3B

0x43

0x4B

0x53

0x5B

0x63

0x6B

UTX1

0x73

P1INT

RF

WDT

0x7B

0x83

0x8B

CPU Interrupt

Mask

IEN0.RFTXRXIE

IEN0.ADCIE

IEN0.URX0IE

IEN0.URX1IE

IEN0.ENCIE

IEN0.STIE

IEN2.P2IE

IEN2.UTX0IE

IEN1.DMAIE

IEN1.T1IE

IEN1.T2IE

IEN1.T3IE

IEN1.T4IE

IEN1.P0IE

IEN2.UTX1IE

IEN2.P1IE

IEN2.RFIE

IEN2.WDTIE

Table 39: Interrupts Overview

CPU Interrupt Flag

TCON.RFTXRXIF10

TCON.ADCIF10

TCON.URX0IF10

TCON.URX1IF10

S0CON.ENCIF

IRCON.STIF11

IRCON2.P2IF11

IRCON2.UTX0IF

IRCON.DMAIF

IRCON.T1IF10,11

IRCON.T2IF10, 11

IRCON.T3IF10, 11

IRCON.T4IF10, 11

IRCON.P0IF11

IRCON2.UTX1IF

IRCON2.P1IF11

S1CON.RFIF11

IRCON2.WDTIF

10 Cleared by HW when the CPU vectors to the ISR

11 Additional interrupt mask bits and/or interrupt flags found in the peripheralâs SFRs

SWRS055F

Page 58 of 241

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