CC2510F16 Datasheet, PDF (237/244 Pages) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller

CC2510Fx / CC2511Fx
Revision
SWRS055E
Date
2007.11.23
Description/Changes
- TX power consumption @ 2.4 kBaud, −6 dBm output power changed to 16 mA on front
page
- 2.1: Added info saying that CC2510Fx/CC2511Fx is SW compatible with CC1110Fx/CC1111Fx
- Table 11: Added Power Down Guard Time
- Made consistent use of VDD for power with reference to power pin if so needed
- Table 19: Corrected HS RCOSC settings for CC2511Fx
- Table 28: C241 replaced by C242
- Table 29: Added manufacturer. Changed R264 to 1.5 kΩ ± 1%
- Replaced Figure 14, Figure 15, and Figure 16 to correct error in address ranges
- Corrected unimplemented RAM range in Section 10.2.3.1
- Table 32: Changed name on registers from AGCTRLn to AGCCTRLn (n = 0, 1, 2), Changed
name on PKTSTATUS register and chip ID range
-Table 37: Added footer explaining opcode for ACALL and AJMP
- 10.5.1: Added note emphasizing that an interrupt must not be enabled without having proper
code located at the corresponding interrupt vector address.
- 10.5.2: Changes made to code example.
- Updated Sections 12.1.3, 12.1.5.1, and 12.1.5.3 with information about system clock source
change, and rewritten info about calibration in Section 12.1.5.3
- 12.1.5.1 and 12.1.7: Added info regarding retention of HS RCOSC calibration result.
- 12.1.5.2: Rewritten to improve readability
- CLKCON.OSC bit. Changed description. It is not longer necessary to set SLEEP.OSC_PD=0
to power up the HS crystal oscillator.
- Rewrote RAM range in Section 12.3.2
- Stated that P1_0 and P1_1 does not have pull capability in register P2INP
- 12.5: Chapter rewritten to be more consistent in the use of the terms “transfer” and “transfer
count”. Added new info regarding the LEN setting. Changes made to Figure 26 and Figure 27
- 12.6.2.1 and 12.6.2.2: Emphasized that the timer wraps around/is loaded with 0x0000 on the
next timer tick after the terminal count value is reached
- 12.8.2: Changed heading text and updated info about power modes. Changed code
examples.
- Fixed bit range for register FADDRH and stated that register WORTIME0 and WORTIME1
defines a combined 16 bit word (WORTIME)
- Replaced all occurrences of WORCTL with WORCTRL
- 12.8.4: Added more detailed info about interrupt and associated flag
12.9.2.1 and 12.9.2.2: Emphasized that the timer wraps around/is loaded with 0x00 on the
next timer tick after the terminal count value is reached
- USBCIF.RESUMIF changed to USBCIF.RESUMEIF several places in the document
Figure 49: Corrected code example
- 13.11.2: - Corrected received symbol write and read location. Added note saying that when
FEC is used, CLKCON.CLKSPD must be 000
- Added note in MDMCFG2 register saying that MSK is only supported for data rates above 26
kBaud and GFSK is only supported for data rate up until 250 kBaud.
SWRS055F
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