English
Language : 

CC2510F16 Datasheet, PDF (182/244 Pages) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller
CC2510Fx / CC2511Fx
0xDE17: USBCNTH - Number of Bytes in EP{1 – 5} OUT FIFO High
Bit Field Name
Reset R/W Description
7:3
-
2:0 USBCNT[10:8] 000
R0 Not used
R
3 MSB of number of received bytes into OUT FIFO selected by USBINDEX
register. Only valid when USBCSOL.OUTPKT_RDY is set
0xDE20: USBF0 - Endpoint 0 FIFO
Bit Field Name
Reset R/W Description
7:0 USBF0[7:0]
0x00
R/W Endpoint 0 FIFO. Reading this register unloads one byte from the EP0 FIFO.
Writing to this register loads one byte into the EP0 FIFO.
Note: The FIFO memory for EP0 is used for both incoming and outgoing data
packets.
0xDE22: USBF1 - Endpoint 1 FIFO
Bit Field Name
Reset R/W Description
7:0 USBF1[7:0]
0x00
R/W Endpoint 1 FIFO register. Reading this register unloads one byte from the EP1
OUT FIFO. Writing to this register loads one byte into the EP1 IN FIFO.
0xDE24: USBF2 - Endpoint 2 FIFO
Bit Field Name
Reset R/W Description
7:0 USBF2[7:0]
0x00 R/W See Endpoint 1 FIFO description.
0xDE26: USBF3 - Endpoint 3 FIFO
Bit Field Name
Reset R/W Description
7:0 USBF3[7:0]
0x00 R/W See Endpoint 1 FIFO description.
0xDE28: USBF4 - Endpoint 4 FIFO
Bit Field Name
Reset R/W Description
7:0 USBF4[7:0]
0x00 R/W See Endpoint 1 FIFO description.
0xDE2A: USBF5 - Endpoint 5 FIFO
Bit Field Name
Reset R/W Description
7:0 USBF5[7:0]
0x00 R/W See Endpoint 1 FIFO description.
SWRS055F
Page 182 of 241