CC2510F16 Datasheet, PDF (105/244 Pages) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller

CC2510Fx / CC2511Fx
Byte Bit
Offset
0
7:0
1
7:0
2
7:0
3
7:0
4
7:5
4
4:0
5
7:0
6
7
6
6:5
6
4:0
7
7:6
7
5:4
Field Name
Description
SRCADDR[15:8]
SRCADDR[7:0]
DESTADDR[15:8]
DESTADDR[7:0]
VLEN[2:0]
LEN[12:8]
LEN[7:0]
WORDSIZE
TMODE[1:0]
TRIG[4:0]
SRCINC[1:0]
DESTINC[1:0]
The DMA channel source address, high byte
The DMA channel source address, low byte
The DMA channel destination address, high byte.
Note that flash memory is not directly writeable.
The DMA channel destination address, low byte.
Note that flash memory is not directly writeable.
Transfer count mode.
000
Use LEN for transfer count
001
Transfer number of bytes/words commanded by n + 1
010
Transfer number of bytes/words commanded by n
011
Transfer number of bytes/words commanded by n + 2
100
Transfer number of bytes/words commanded by n + 3
101
Reserved
110
Reserved
111
Alternative for using LEN as transfer count
Note: For byte size transfers (see Section 12.5.2.4), n is defined as the first byte in
source data or the 7 LSB of the first byte in source data, depending on the M8
setting (see Section 12.5.2.9). For word size transfers, n is the 13 LSB of the first
word in source data.
This value is used as transfer count when VLEN=000 or VLEN=111 (fixed length
transfer count). For all cases where VLEN≠000 and VLEN≠111 (variable length
transfer count), the transfer count will be limited to LEN bytes/words when n ≥ LEN.
In cases where n < LEN, the transfer count is given by the VLEN setting.
Selects whether each transfer shall be 8-bit (0) or 16-bit (1).
Transfer mode:
00
Single
01
Block
10
Repeated single
11
Repeated block
Select DMA trigger
00000 No trigger (writing to DMAREQ is only trigger)
00001 The previous DMA channel finished
00010
-
11111
Selects one of the triggers shown in Table 51. The trigger is selected in the
order shown in the table.
Source address increment mode (after each transfer)
00
0 bytes/words
01
1 bytes/words
10
2 bytes/words
11
−1 bytes/words
Destination address increment mode (after each transfer)
00 0 bytes/words
01 1 bytes/words
10 2 bytes/words
11 −1 bytes/words
SWRS055F
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