LM3S3749 Datasheet, PDF (5/898 Pages) Texas Instruments – Stellaris® LM3S3749 Microcontroller

Stellaris® LM3S3749 Microcontroller
6
6.1
6.2
6.3
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
6.4
6.4.1
6.4.2
6.4.3
6.4.4
6.4.5
6.5
6.6
Hibernation Module .............................................................................................. 249
Block Diagram ............................................................................................................ 250
Signal Description ....................................................................................................... 250
Functional Description ................................................................................................. 251
Register Access Timing ............................................................................................... 251
Clock Source .............................................................................................................. 251
Battery Management ................................................................................................... 253
Real-Time Clock .......................................................................................................... 253
Battery-Backed Memory .............................................................................................. 253
Power Control ............................................................................................................. 254
Initiating Hibernate ...................................................................................................... 254
Interrupts and Status ................................................................................................... 254
Initialization and Configuration ..................................................................................... 255
Initialization ................................................................................................................. 255
RTC Match Functionality (No Hibernation) .................................................................... 255
RTC Match/Wake-Up from Hibernation ......................................................................... 255
External Wake-Up from Hibernation .............................................................................. 256
RTC/External Wake-Up from Hibernation ...................................................................... 256
Register Map .............................................................................................................. 256
Register Descriptions .................................................................................................. 257
7
7.1
7.2
7.2.1
7.2.2
7.2.3
7.3
7.3.1
7.3.2
7.4
7.5
7.6
7.7
Internal Memory ................................................................................................... 271
Block Diagram ............................................................................................................ 271
Functional Description ................................................................................................. 271
SRAM Memory ............................................................................................................ 271
ROM Memory ............................................................................................................. 272
Flash Memory ............................................................................................................. 272
Flash Memory Initialization and Configuration ............................................................... 274
Flash Programming ..................................................................................................... 274
Nonvolatile Register Programming ............................................................................... 274
Register Map .............................................................................................................. 275
ROM Register Descriptions (System Control Offset) ...................................................... 276
Flash Register Descriptions (Flash Control Offset) ......................................................... 277
Flash Register Descriptions (System Control Offset) ...................................................... 285
8
Micro Direct Memory Access (μDMA) ................................................................ 300
8.1 Block Diagram ............................................................................................................ 301
8.2 Functional Description ................................................................................................. 301
8.2.1 Channel Assigments .................................................................................................... 302
8.2.2 Priority ........................................................................................................................ 302
8.2.3 Arbitration Size ............................................................................................................ 302
8.2.4 Request Types ............................................................................................................ 303
8.2.5 Channel Configuration ................................................................................................. 303
8.2.6 Transfer Modes ........................................................................................................... 305
8.2.7 Transfer Size and Increment ........................................................................................ 313
8.2.8 Peripheral Interface ..................................................................................................... 313
8.2.9 Software Request ........................................................................................................ 313
8.2.10 Interrupts and Errors .................................................................................................... 314
8.3 Initialization and Configuration ..................................................................................... 314
8.3.1 Module Initialization ..................................................................................................... 314
November 17, 2011
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