LM3S3749 Datasheet, PDF (277/898 Pages) Texas Instruments – Stellaris® LM3S3749 Microcontroller

Stellaris® LM3S3749 Microcontroller
Register 1: ROM Control (RMCTL), offset 0x0F0
This register provides control of the ROM controller state.
ROM Control (RMCTL)
Base 0x400F.E000
Offset 0x0F0
Type R/W1C, reset -
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
BA
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO R/W1C
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
Bit/Field
31:1
0
Name
reserved
BA
Type
RO
R/W1C
Reset
0x0
-
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Boot Alias
■ The device has ROM.
■ The first two words of the Flash memory contain 0xFFFF.FFFF.
This bit is cleared by writing a 1 to this bit position.
When the BA bit is set, the boot alias is in effect and the ROM appears
at address 0x0. When the BA bit is clear, the Flash appears at address
0x0.
7.6 Flash Register Descriptions (Flash Control Offset)
This section lists and describes the Flash Memory registers, in numerical order by address offset.
Registers in this section are relative to the Flash control base address of 0x400F.D000.
November 17, 2011
277
Texas Instruments-Production Data