LM3S3749 Datasheet, PDF (26/898 Pages) Texas Instruments – Stellaris® LM3S3749 Microcontroller

Table of Contents
Register 87:
Register 88:
Register 89:
Register 90:
Register 91:
Register 92:
Register 93:
Register 94:
Register 95:
USB Transmit Double Packet Buffer Disable (USBTXDPKTBUFDIS), offset 0x342 ............ 711
USB External Power Control (USBEPC), offset 0x400 ...................................................... 712
USB External Power Control Raw Interrupt Status (USBEPCRIS), offset 0x404 ................. 715
USB External Power Control Interrupt Mask (USBEPCIM), offset 0x408 ............................ 716
USB External Power Control Interrupt Status and Clear (USBEPCISC), offset 0x40C ......... 717
USB Device RESUME Raw Interrupt Status (USBDRRIS), offset 0x410 ............................ 718
USB Device RESUME Interrupt Mask (USBDRIM), offset 0x414 ....................................... 719
USB Device RESUME Interrupt Status and Clear (USBDRISC), offset 0x418 .................... 720
USB General-Purpose Control and Status (USBGPCS), offset 0x41C ............................... 721
Analog Comparators ................................................................................................................... 722
Register 1: Analog Comparator Masked Interrupt Status (ACMIS), offset 0x000 .................................. 728
Register 2: Analog Comparator Raw Interrupt Status (ACRIS), offset 0x004 ....................................... 729
Register 3: Analog Comparator Interrupt Enable (ACINTEN), offset 0x008 ......................................... 730
Register 4: Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x010 ....................... 731
Register 5: Analog Comparator Status 0 (ACSTAT0), offset 0x020 ..................................................... 732
Register 6: Analog Comparator Status 1 (ACSTAT1), offset 0x040 ..................................................... 732
Register 7: Analog Comparator Control 0 (ACCTL0), offset 0x024 ..................................................... 733
Register 8: Analog Comparator Control 1 (ACCTL1), offset 0x044 ..................................................... 733
Pulse Width Modulator (PWM) .................................................................................................... 735
Register 1: PWM Master Control (PWMCTL), offset 0x000 ................................................................ 747
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004 ........................................................... 748
Register 3: PWM Output Enable (PWMENABLE), offset 0x008 .......................................................... 749
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C ....................................................... 751
Register 5: PWM Output Fault (PWMFAULT), offset 0x010 ................................................................ 752
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014 ........................................................... 754
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 ........................................................ 756
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C ................................................ 757
Register 9: PWM Status (PWMSTATUS), offset 0x020 ...................................................................... 759
Register 10: PWM Fault Condition Value (PWMFAULTVAL), offset 0x024 ............................................ 760
Register 11: PWM0 Control (PWM0CTL), offset 0x040 ....................................................................... 761
Register 12: PWM1 Control (PWM1CTL), offset 0x080 ....................................................................... 761
Register 13: PWM2 Control (PWM2CTL), offset 0x0C0 ...................................................................... 761
Register 14: PWM3 Control (PWM3CTL), offset 0x100 ....................................................................... 761
Register 15: PWM0 Interrupt and Trigger Enable (PWM0INTEN), offset 0x044 .................................... 766
Register 16: PWM1 Interrupt and Trigger Enable (PWM1INTEN), offset 0x084 .................................... 766
Register 17: PWM2 Interrupt and Trigger Enable (PWM2INTEN), offset 0x0C4 .................................... 766
Register 18: PWM3 Interrupt and Trigger Enable (PWM3INTEN), offset 0x104 ..................................... 766
Register 19: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .................................................... 769
Register 20: PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 .................................................... 769
Register 21: PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8 ................................................... 769
Register 22: PWM3 Raw Interrupt Status (PWM3RIS), offset 0x108 ..................................................... 769
Register 23: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ........................................... 770
Register 24: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ........................................... 770
Register 25: PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC ........................................... 770
Register 26: PWM3 Interrupt Status and Clear (PWM3ISC), offset 0x10C ............................................ 770
Register 27: PWM0 Load (PWM0LOAD), offset 0x050 ....................................................................... 771
Register 28: PWM1 Load (PWM1LOAD), offset 0x090 ....................................................................... 771
Register 29: PWM2 Load (PWM2LOAD), offset 0x0D0 ....................................................................... 771
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November 17, 2011
Texas Instruments-Production Data