LM3S3749 Datasheet, PDF (31/898 Pages) Texas Instruments – Stellaris® LM3S3749 Microcontroller

Stellaris® LM3S3749 Microcontroller
Table 1. Revision History (continued)
Date
September 2010
Revision
7783
Description
■ Reorganized ARM Cortex-M3 Processor Core, Memory Map and Interrupts chapters, creating two
new chapters, The Cortex-M3 Processor and Cortex-M3 Peripherals. Much additional content was
added, including all the Cortex-M3 registers.
■ Changed register names to be consistent with StellarisWare names: the Cortex-M3 Interrupt Control
and Status (ICSR) register to the Interrupt Control and State (INTCTRL) register, and the
Cortex-M3 Interrupt Set Enable (SETNA) register to the Interrupt 0-31 Set Enable (EN0) register.
■ In the Internal Memory chapter:
– Added clarification of instruction execution during Flash operations.
– Deleted ROM Version (RMVER) register as it is not used.
■ In the GPIO chapter:
– Renamed the GPIO High-Speed Control (GPIOHSCTL) register to the GPIO High-Performance
Bus Control (GPIOHBCTL) register.
– Added clarification about the operation of the Advanced High-Performance Bus (AHB) and the
legacy Advanced Peripheral Bus (APB).
– Modified Figure 9-1 on page 366 and Figure 9-2 on page 367 to clarify operation of the GPIO
inputs when used as an alternate function.
– Corrected GPIOAMSEL bit field in GPIO Analog Mode Select (GPIOAMSEL) register to be
eight-bits wide, bits[7:0].
■ In General-Purpose Timers chapter, clarified operation of the 32-bit RTC mode.
■ Numerous improvements and clarifications to the USB chapter. Also corrected definitions for bits
2 and 5 in the USBIE register.
■ In Electrical Characteristics chapter:
– Added "Input voltage for a GPIO configured as an analog input" value to Table 23-1 on page 826.
– Added I_LKG parameter (GPIO input leakage current) to Table 23-4 on page 827.
– Corrected values for t_CLKRF parameter (SSIClk rise/fall time) in Table 23-22 on page 837.
■ Added dimensions for Tray and Tape and Reel shipping mediums.
June 2010
7403
■ Corrected base address for SRAM in architectural overview chapter.
■ Clarified system clock operation, adding content to “Clock Control” on page 180.
■ In Signal Tables chapter, added table "Connections for Unused Signals."
■ In "Reset Characteristics" table, corrected value for supply voltage (VDD) rise time.
■ Additional minor data sheet clarifications and corrections.
April 2010
7021
■ Added caution note to the I²C Master Timer Period (I2CMTPR) register description and changed
field width to 7 bits.
■ Added note about RST signal routing.
■ Clarified the function of the TnSTALL bit in the GPTMCTL register.
■ Additional minor data sheet clarifications and corrections.
November 17, 2011
31
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