LM3S3749 Datasheet, PDF (3/898 Pages) Texas Instruments – Stellaris® LM3S3749 Microcontroller

Stellaris® LM3S3749 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 29
About This Document .................................................................................................................... 35
Audience .............................................................................................................................................. 35
About This Manual ................................................................................................................................ 35
Related Documents ............................................................................................................................... 35
Documentation Conventions .................................................................................................................. 36
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
Architectural Overview .......................................................................................... 38
Product Features .......................................................................................................... 38
Target Applications ........................................................................................................ 48
High-Level Block Diagram ............................................................................................. 48
Functional Overview ...................................................................................................... 50
ARM Cortex™-M3 ......................................................................................................... 50
Motor Control Peripherals .............................................................................................. 51
Analog Peripherals ........................................................................................................ 52
Serial Communications Peripherals ................................................................................ 53
System Peripherals ....................................................................................................... 54
Memory Peripherals ...................................................................................................... 55
Additional Features ....................................................................................................... 55
Hardware Details .......................................................................................................... 56
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
2.5.3
The Cortex-M3 Processor ...................................................................................... 57
Block Diagram .............................................................................................................. 58
Overview ...................................................................................................................... 59
System-Level Interface .................................................................................................. 59
Integrated Configurable Debug ...................................................................................... 59
Trace Port Interface Unit (TPIU) ..................................................................................... 60
Cortex-M3 System Component Details ........................................................................... 60
Programming Model ...................................................................................................... 61
Processor Mode and Privilege Levels for Software Execution ........................................... 61
Stacks .......................................................................................................................... 61
Register Map ................................................................................................................ 62
Register Descriptions .................................................................................................... 63
Exceptions and Interrupts .............................................................................................. 76
Data Types ................................................................................................................... 76
Memory Model .............................................................................................................. 76
Memory Regions, Types and Attributes ........................................................................... 78
Memory System Ordering of Memory Accesses .............................................................. 78
Behavior of Memory Accesses ....................................................................................... 79
Software Ordering of Memory Accesses ......................................................................... 79
Bit-Banding ................................................................................................................... 81
Data Storage ................................................................................................................ 83
Synchronization Primitives ............................................................................................. 83
Exception Model ........................................................................................................... 84
Exception States ........................................................................................................... 85
Exception Types ............................................................................................................ 85
Exception Handlers ....................................................................................................... 88
November 17, 2011
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