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LM3S3749 Datasheet, PDF (11/898 Pages) Texas Instruments – Stellaris® LM3S3749 Microcontroller
Stellaris® LM3S3749 Microcontroller
List of Figures
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Stellaris LM3S3749 Microcontroller High-Level Block Diagram .............................. 49
CPU Block Diagram ............................................................................................. 59
TPIU Block Diagram ............................................................................................ 60
Cortex-M3 Register Set ........................................................................................ 62
Bit-Band Mapping ................................................................................................ 82
Data Storage ....................................................................................................... 83
Vector Table ........................................................................................................ 89
Exception Stack Frame ........................................................................................ 91
SRD Use Example ............................................................................................. 105
JTAG Module Block Diagram .............................................................................. 164
Test Access Port State Machine ......................................................................... 167
IDCODE Register Format ................................................................................... 173
BYPASS Register Format ................................................................................... 173
Boundary Scan Register Format ......................................................................... 174
Basic RST Configuration .................................................................................... 177
External Circuitry to Extend Power-On Reset ....................................................... 177
Reset Circuit Controlled by Switch ...................................................................... 178
Main Clock Tree ................................................................................................ 182
Hibernation Module Block Diagram ..................................................................... 250
Clock Source Using Crystal ................................................................................ 252
Clock Source Using Dedicated Oscillator ............................................................. 252
Flash Block Diagram .......................................................................................... 271
μDMA Block Diagram ......................................................................................... 301
Example of Ping-Pong DMA Transaction ............................................................. 306
Memory Scatter-Gather, Setup and Configuration ................................................ 308
Memory Scatter-Gather, μDMA Copy Sequence .................................................. 309
Peripheral Scatter-Gather, Setup and Configuration ............................................. 311
Peripheral Scatter-Gather, μDMA Copy Sequence ............................................... 312
Digital I/O Pads ................................................................................................. 366
Analog/Digital I/O Pads ...................................................................................... 367
GPIODATA Write Example ................................................................................. 368
GPIODATA Read Example ................................................................................. 368
GPTM Module Block Diagram ............................................................................ 414
16-Bit Input Edge Count Mode Example .............................................................. 418
16-Bit Input Edge Time Mode Example ............................................................... 419
16-Bit PWM Mode Example ................................................................................ 420
WDT Module Block Diagram .............................................................................. 448
ADC Module Block Diagram ............................................................................... 472
Differential Sampling Range, VIN_ODD = 1.5 V ...................................................... 476
Differential Sampling Range, VIN_ODD = 0.75 V .................................................... 476
Differential Sampling Range, VIN_ODD = 2.25 V .................................................... 477
Internal Temperature Sensor Characteristic ......................................................... 478
UART Module Block Diagram ............................................................................. 508
UART Character Frame ..................................................................................... 509
IrDA Data Modulation ......................................................................................... 511
SSI Module Block Diagram ................................................................................. 552
November 17, 2011
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