LM3S3749 Datasheet, PDF (174/898 Pages) Texas Instruments – Stellaris® LM3S3749 Microcontroller

JTAG Interface
Figure 4-5. Boundary Scan Register Format
TDI I
N
O
U
T
O _... I
E
N
O
U
T
O
E
GPIO PB6
GPIO m
I
N
O
U
T
O _...
E
I
N
O
U
T
O TDO
E
GPIO m +1
GPIO n
4.5.2.4
4.5.2.5
4.5.2.6
APACC Data Register
The format for the 35-bit APACC Data Register defined by ARM is described in the ARM® Debug
Interface V5 Architecture Specification.
DPACC Data Register
The format for the 35-bit DPACC Data Register defined by ARM is described in the ARM® Debug
Interface V5 Architecture Specification.
ABORT Data Register
The format for the 35-bit ABORT Data Register defined by ARM is described in the ARM® Debug
Interface V5 Architecture Specification.
174
November 17, 2011
Texas Instruments-Production Data