LM3S3749 Datasheet, PDF (24/898 Pages) Texas Instruments – Stellaris® LM3S3749 Microcontroller

Table of Contents
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
I²C Slave Own Address (I2CSOAR), offset 0x800 ............................................................ 620
I²C Slave Control/Status (I2CSCSR), offset 0x804 ........................................................... 621
I²C Slave Data (I2CSDR), offset 0x808 ........................................................................... 623
I²C Slave Interrupt Mask (I2CSIMR), offset 0x80C ........................................................... 624
I²C Slave Raw Interrupt Status (I2CSRIS), offset 0x810 ................................................... 625
I²C Slave Masked Interrupt Status (I2CSMIS), offset 0x814 .............................................. 626
I²C Slave Interrupt Clear (I2CSICR), offset 0x818 ............................................................ 627
Universal Serial Bus (USB) Controller ....................................................................................... 628
Register 1: USB Device Functional Address (USBFADDR), offset 0x000 ............................................ 645
Register 2: USB Power (USBPOWER), offset 0x001 ......................................................................... 646
Register 3: USB Transmit Interrupt Status (USBTXIS), offset 0x002 ................................................... 649
Register 4: USB Receive Interrupt Status (USBRXIS), offset 0x004 ................................................... 650
Register 5: USB Transmit Interrupt Enable (USBTXIE), offset 0x006 .................................................. 651
Register 6: USB Receive Interrupt Enable (USBRXIE), offset 0x008 .................................................. 652
Register 7: USB General Interrupt Status (USBIS), offset 0x00A ........................................................ 653
Register 8: USB Interrupt Enable (USBIE), offset 0x00B .................................................................... 656
Register 9: USB Frame Value (USBFRAME), offset 0x00C ................................................................ 659
Register 10: USB Endpoint Index (USBEPIDX), offset 0x00E .............................................................. 660
Register 11: USB Test Mode (USBTEST), offset 0x00F ....................................................................... 661
Register 12: USB FIFO Endpoint 0 (USBFIFO0), offset 0x020 ............................................................. 663
Register 13: USB FIFO Endpoint 1 (USBFIFO1), offset 0x024 ............................................................. 663
Register 14: USB FIFO Endpoint 2 (USBFIFO2), offset 0x028 ............................................................. 663
Register 15: USB FIFO Endpoint 3 (USBFIFO3), offset 0x02C ............................................................ 663
Register 16: USB Device Control (USBDEVCTL), offset 0x060 ............................................................ 664
Register 17: USB Transmit Dynamic FIFO Sizing (USBTXFIFOSZ), offset 0x062 ................................. 665
Register 18: USB Receive Dynamic FIFO Sizing (USBRXFIFOSZ), offset 0x063 .................................. 665
Register 19: USB Transmit FIFO Start Address (USBTXFIFOADD), offset 0x064 ................................. 666
Register 20: USB Receive FIFO Start Address (USBRXFIFOADD), offset 0x066 .................................. 666
Register 21: USB Connect Timing (USBCONTIM), offset 0x07A .......................................................... 667
Register 22: USB Full-Speed Last Transaction to End of Frame Timing (USBFSEOF), offset 0x07D ...... 668
Register 23: USB Low-Speed Last Transaction to End of Frame Timing (USBLSEOF), offset 0x07E ...... 669
Register 24: USB Transmit Functional Address Endpoint 0 (USBTXFUNCADDR0), offset 0x080 ........... 670
Register 25: USB Transmit Functional Address Endpoint 1 (USBTXFUNCADDR1), offset 0x088 ........... 670
Register 26: USB Transmit Functional Address Endpoint 2 (USBTXFUNCADDR2), offset 0x090 ........... 670
Register 27: USB Transmit Functional Address Endpoint 3 (USBTXFUNCADDR3), offset 0x098 ........... 670
Register 28: USB Transmit Hub Address Endpoint 0 (USBTXHUBADDR0), offset 0x082 ...................... 671
Register 29: USB Transmit Hub Address Endpoint 1 (USBTXHUBADDR1), offset 0x08A ...................... 671
Register 30: USB Transmit Hub Address Endpoint 2 (USBTXHUBADDR2), offset 0x092 ...................... 671
Register 31: USB Transmit Hub Address Endpoint 3 (USBTXHUBADDR3), offset 0x09A ...................... 671
Register 32: USB Transmit Hub Port Endpoint 0 (USBTXHUBPORT0), offset 0x083 ............................. 672
Register 33: USB Transmit Hub Port Endpoint 1 (USBTXHUBPORT1), offset 0x08B ............................ 672
Register 34: USB Transmit Hub Port Endpoint 2 (USBTXHUBPORT2), offset 0x093 ............................. 672
Register 35: USB Transmit Hub Port Endpoint 3 (USBTXHUBPORT3), offset 0x09B ............................ 672
Register 36: USB Receive Functional Address Endpoint 1 (USBRXFUNCADDR1), offset 0x08C ........... 673
Register 37: USB Receive Functional Address Endpoint 2 (USBRXFUNCADDR2), offset 0x094 ........... 673
Register 38: USB Receive Functional Address Endpoint 3 (USBRXFUNCADDR3), offset 0x09C ........... 673
Register 39: USB Receive Hub Address Endpoint 1 (USBRXHUBADDR1), offset 0x08E ...................... 674
Register 40: USB Receive Hub Address Endpoint 2 (USBRXHUBADDR2), offset 0x096 ....................... 674
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November 17, 2011
Texas Instruments-Production Data