LM3S3749 Datasheet, PDF (246/898 Pages) Texas Instruments – Stellaris® LM3S3749 Microcontroller

System Control
Register 33: Software Reset Control 1 (SRCR1), offset 0x044
Writes to this register are masked by the bits in the Device Capabilities 2 (DC2) register.
Software Reset Control 1 (SRCR1)
Base 0x400F.E000
Offset 0x044
Type R/W, reset 0x00000000
31
30
29
28
27
reserved
Type RO
RO
RO
RO
RO
Reset
0
0
0
0
0
15
14
13
12
11
reserved
I2C1
reserved
I2C0
Type RO
R/W
RO
R/W
RO
Reset
0
0
0
0
0
26
25
24
COMP1 COMP0
RO
R/W
R/W
0
0
0
10
9
reserved
RO
RO
0
0
8
QEI0
R/W
0
23
22
21
reserved
RO
RO
RO
0
0
0
7
6
reserved
RO
RO
0
0
5
SSI1
R/W
0
20
19
18
17
16
TIMER3 TIMER2 TIMER1 TIMER0
RO
R/W
R/W
R/W
R/W
0
0
0
0
0
4
SSI0
R/W
0
3
2
1
0
reserved UART2 UART1 UART0
RO
R/W
R/W
R/W
0
0
0
0
Bit/Field
31:26
25
24
23:20
19
18
17
16
15
14
13
12
11:9
8
Name
reserved
COMP1
COMP0
reserved
TIMER3
TIMER2
TIMER1
TIMER0
reserved
I2C1
reserved
I2C0
reserved
QEI0
Type
RO
R/W
R/W
RO
R/W
R/W
R/W
R/W
RO
R/W
RO
R/W
RO
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Analog Comp 1 Reset Control. Reset control for analog comparator 1.
Analog Comp 0 Reset Control. Reset control for analog comparator 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Timer 3 Reset Control. Reset control for General-Purpose Timer module
3.
Timer 2 Reset Control. Reset control for General-Purpose Timer module
2.
Timer 1 Reset Control. Reset control for General-Purpose Timer module
1.
Timer 0 Reset Control. Reset control for General-Purpose Timer module
0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I2C1 Reset Control. Reset control for I2C unit 1.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I2C0 Reset Control. Reset control for I2C unit 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
QEI0 Reset Control. Reset control for QEI unit 0.
246
November 17, 2011
Texas Instruments-Production Data