DS90UR905Q-Q1 Datasheet, PDF(40/58 Page) Texas Instruments – 5- to 65-MHz, 24-bit Color FPD-Link II Serializer and Deserializer

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DS90UR905Q-Q1 Datasheet, PDF (40/58 Pages) Texas Instruments – 5- to 65-MHz, 24-bit Color FPD-Link II Serializer and Deserializer

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DS90UR905Q-Q1, DS90UR906Q-Q1

SNLS313H â SEPTEMBER 2009 â REVISED JULY 2015

www.ti.com

Table 15. DESERIALIZER â Serial Bus Control Registers

ADD ADD REGISTER

(DEC) (HEX) NAME

Deserializer

Config 1

1 Slave ID

Deserializer

Features 1

BIT(S) R/W

7 R/W

6 R/W

5 R/W

4 R/W

3:2 R/W

1 R/W

0 R/W

7 R/W

6:0 R/W

7 R/W

6 R/W

5:4 R/W

3 R/W

2:0 R/W

DEFAULT

(BIN)

1110000

FUNCTION DESCRIPTION

LFMODE

OS_PCLK

OS_DATA

RFB

CONFIG

SLEEP

REG Control

ID[X]

OP_LOW

Release/Set

OSS_SEL

MAP_SEL

OP_LOW

strap bypass

OSC_SEL

0: 20 to 65 MHz Operation

1: 5 to 20 MHz Operation

0: Normal PCLK Output Slew

1: Increased PCLK Slew

0: Normal DATA OUTPUT Slew

1: Increased Data Slew

0: Data strobed on Falling edge of PCLK

1: Data strobed on Rising edge of PCLK

00: Normal Mode, Control Signal Filter Disabled

01: Normal Mode, Control Signal Filter Enabled

10: Backwards-Compatible (DS90UR241)

11: Backwards-Compatible (DS90C241)

Note â not the same function as PowerDown (PDB)

0: normal mode

1: Sleep Mode â Register settings retained.

0: Configurations set from control pins / STRAP pins

1: Configurations set from registers (except I2C_ID)

0: Address from ID[X] Pin

1: Address from Register

Serial Bus Device ID, Four IDs are:

7b '1110 001 (h'71)

7b '1110 010 (h'72)

7b '1110 011 (h'73)

7b '1110 110 (h'76)

All other addresses are Reserved.

0: set outputs state LOW (except LOCK)

1: release output LOW state, outputs toggling

normally

Note: This register only works during LOCK = 1.

Output Sleep State Select

0: PCLK/RGB[7:0]/HS/VS/DE = L, LOCK = Normal,

PASS = H

1: PCLK/RGB[7:0]/HS/VS/DE = Tri-State, LOCK =

Normal, PASS = H

Special for Backwards-Compatible Mode

00: bit 4, 5 on LSB

01: LSB zero if all data is zero; one if any data is one

10: LSB zero

11: LSB zero

0: strap will determine whether OP_LOW feature is

ON or OFF

1: Turns OFF OP_LOW feature

000: OFF

001: 50 MHz Â±40%

010: 25 MHz Â±40%

011: 16.7 MHz Â±40%

100: 12.5 MHz Â±40%

101: 10 MHz Â±40%

110: 8.3 MHz Â±40%

111: 6.3 MHz Â±40%

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