DS90UR905Q-Q1 Datasheet, PDF (28/58 Pages) Texas Instruments – 5- to 65-MHz, 24-bit Color FPD-Link II Serializer and Deserializer

DS90UR905Q-Q1, DS90UR906Q-Q1
SNLS313H – SEPTEMBER 2009 – REVISED JULY 2015
www.ti.com
EQ3
L
L
L
L
H
H
H
H
X
(1) Default Setting is EQ = Off
Table 3. Receiver Equalization Configuration Table
EQ2
L
L
H
H
L
L
H
H
X
INPUTS
EQ1
L
H
L
H
L
H
L
H
X
EQ0
H
H
H
H
H
H
H
H
L
EFFECT
≈1.5 dB
≈3 dB
≈4.5 dB
≈6 dB
≈7.5 dB
≈9 dB
≈10.5 dB
≈12 dB
OFF ⁽¹⁾
8.3.4.2 EMI Reduction Features
8.3.4.2.1 Deserializer Output Slew (OS_PCLK/DATA)
The parallel bus outputs (RGB[7:0], VS, HS, DE and PCLK) of the deserializer feature a selectable output slew.
The DATA (RGB[7:0], VS, HS, DE) are controlled by strap pin or register bit OS_DATA. The PCLK is controlled
by strap pin or register bit OS_PCLK. When the OS_PCLK/DATA = HIGH, the maximum slew rate is selected.
When the OS_PCLK/DATA = LOW, the minimum slew rate is selected. Use the higher slew rate setting when
driving longer traces or a heavier capacitive load.
8.3.4.2.2 Deserializer Common-Mode Filter Pin (CMF) — Optional
The deserializer provides access to the center tap of the internal termination. A capacitor may be placed on this
pin for additional common-mode filtering of the differential pair. This can be useful in high noise environments for
additional noise rejection capability. A 0.1-µF capacitor may be connected to this pin to Ground.
8.3.4.2.3 Deserializer SSCG Generation — Optional
The deserializer provides an internally generated spread spectrum clock (SSCG) to modulate its outputs. Both
clock and data outputs are modulated. This will aid to lower system EMI. Output SSCG deviations to ±2.0% (4%
total) at up to 35kHz modulations nominally are available (see Table 4). This feature may be controlled by
external STRAP pins or by register.
SSC3
L
L
L
L
L
L
L
L
H
H
H
H
H
Table 4. SSCG Configuration (LF_MODE = L) — Deserializer Output
SSC[3:0] INPUTS
LF_MODE = L (20 to 65 MHz)
SSC2
SSC1
L
L
L
L
L
H
L
H
H
L
H
L
H
H
H
H
L
L
L
L
L
H
L
H
H
L
SSC0
L
H
L
H
L
H
L
H
L
H
L
H
L
RESULT
FDEV (%)
Off
±0.5
±1.0
±1.5
±2.0
±0.5
±1.0
±1.5
±2.0
±0.5
±1.0
±1.5
±2.0
FMOD (kHz)
Off
PCLK/2168
PCLK/1300
PCLK/868
28
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