LMK00306_16 Datasheet, PDF (3/39 Pages) Texas Instruments – 3-GHz 6-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator

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LMK00306
SNAS578D – FEBRUARY 2012 – REVISED MARCH 2016
• Changed Single-Ended LVCMOS Input, DC Coupling with Common Mode Biasing image with revised graphic............... 23
• Added text to second paragraph of Termination for AC Coupled Differential Operation to explain graphic update to
Differential LVDS Operation with AC Coupling to Receivers. .............................................................................................. 26
• Changed graphic for Differential LVDS Operation, AC Coupling, No Biasing by the Receiver and updated caption. ........ 26
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