LMK00306_16 Datasheet, PDF (16/39 Pages) Texas Instruments – 3-GHz 6-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator

LMK00306
SNAS578D – FEBRUARY 2012 – REVISED MARCH 2016
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Typical Characteristics (continued)
Unless otherwise specified: Vcc = 3.3 V, Vcco = 3.3 V, T_A = 25 °C, CLKin driven differentially, input slew rate ≥ 3 V/ns.
Consult Table 1 at the end of Typical Characteristics for graph footnotes.
500 _LVPECL
450 ^LVDS
Fclk=156.25 MHz
400
HCSL
CLKin Source
Int. BW=1-20 MHz
350
300
250
200
150
100
50
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5
DIFFERENTIAL INPUT SLEW RATE (V/ns)
200 _LVPECL
175
LVDS
CLKin Source
Fclk=625 MHz
Int. BW=1-20 MHz
150
125
100
75
50
25
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5
DIFFERENTIAL INPUT SLEW RATE (V/ns)
See Note 1 in Graph Notes
Figure 13. RMS Jitter vs. CLKin Slew Rate @ 156.25 MHz
-50 _LVPECL
-55
LVDS
HCSL
-60
Fclk=156.25 MHz
Vcco Ripple=100 mVpp
-65
-70
-75
-80
-85
-90
.1
1
10
RIPPLE FREQUENCY (MHz)
Figure 14. RMS Jitter vs. CLKin Slew Rate @ 625 MHz
-50 _LVPECL
-55
LVDS
HCSL
Fclk=312.5 MHz
Vcco Ripple=100 mVpp
-60
-65
-70
-75
-80
-85
-90
.1
1
10
RIPPLE FREQUENCY (MHz)
Figure 15. PSRR vs. Ripple Frequency @ 156.25 MHz
850 _{LVPECL (0.35 ps/°C)}
LVDS (0.35 ps/°C)
750
HCSL (0.35 ps/°C)
LVCMOS (2.2 ps/°C)
650
Right Y-axis plot
1950
1850
1750
550
1650
450
1550
350
1450
250
-50
-25 0 25 50 75
TEMPERATURE (°C)
1350
100
Figure 16. PSRR vs. Ripple Frequency @ 312.5 MHz
Figure 17. Propagation Delay vs. Temperature
See Note 1 in Graph Notes table
Figure 18. LVPECL Phase Noise @ 100 MHz
16
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