LMK00306_16 Datasheet, PDF (13/39 Pages) Texas Instruments – 3-GHz 6-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator

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LMK00306
SNAS578D – FEBRUARY 2012 – REVISED MARCH 2016
Electrical Characteristics (continued)
Unless otherwise specified: Vcc = 3.3 V ± 5%, Vcco = 3.3 V ± 5%, 2.5 V ± 5%, -40 °C ≤ T_A ≤ 85 °C, CLKin driven
differentially, input slew rate ≥ 3 V/ns. Typical values represent most likely parametric norms at Vcc = 3.3 V, Vcco = 3.3 V, T_A
= 25 °C, and at the Recommended Operation Conditions at the time of product characterization and are not ensured. ⁽¹⁾⁽²⁾
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
PROPAGATION DELAY and OUTPUT SKEW
t_{PD_PECL}
t_{PD_LVDS}
Propagation Delay
CLKin-to-LVPECL ⁽⁷⁾
Propagation Delay
CLKin-to-LVDS ⁽⁷⁾
R_T = 160 Ω to GND, R_L = 100 Ω differential,
C_L ≤ 5 pF
R_L = 100 Ω differential, CL ≤ 5 pF
180
360
540 ps
200
400
600 ps
t_{PD_HCSL}
Propagation Delay
CLKin-to-HCSL ^{(7) (16)}
R_T = 50 Ω to GND, C_L ≤ 5 pF
295
590
885 ps
t_{PD_CMOS}
Propagation Delay
CLKin-to-LVCMOS ^{(7) (16)}
C_L ≤ 5 pF
Vcco = 3.3 V
Vcco = 2.5 V
900
1000
1475
1550
2300
ps
2700
t_SK(O)
t_SK(PP)
Output Skew
LVPECL/LVDS/HCSL
(5) (16) (18)
Part-to-Part Output
Skew
LVPECL/LVDS/HCSL
(7) (16) (18)
Skew specified between any two CLKouts with the
same buffer type. Load conditions per output type
are the same as propagation delay specifications.
30
50 ps
80
120 ps
(18) Output skew is the propagation delay difference between any two outputs with identical output buffer type and equal loading while
operating at the same supply voltage and temperature conditions.
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