LMK00306_16 Datasheet, PDF (20/39 Pages) Texas Instruments – 3-GHz 6-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator

LMK00306
SNAS578D – FEBRUARY 2012 – REVISED MARCH 2016
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8.3 Feature Description
8.3.1 V_CC and V_CCO Power Supplies
The LMK00306 has separate 3.3 V core supply (V_CC) and 3 independent 3.3 V/2.5 V output power supplies
(V_CCOA, V_CCOB, V_CCOC). Output supply operation at 2.5 V enables lower power consumption and output-level
compatibility with 2.5 V receiver devices. The output levels for LVPECL (V_OH, V_OL) and LVCMOS (V_OH) are
referenced to the respective Vcco supply, while the output levels for LVDS and HCSL are relatively constant over
the specified Vcco range. Refer to Power Supply Recommendations for additional supply related considerations,
such as power dissipation, power supply bypassing, and power supply ripple rejection (PSRR).
NOTE
Care should be taken to ensure the Vcco voltages do not exceed the Vcc voltage to
prevent turning-on the internal ESD protection circuitry.
8.3.2 Clock Inputs
The input clock can be selected from CLKin0/CLKin0*, CLKin1/CLKin1*, or OSCin. Clock input selection is
controlled using the CLKin_SEL[1:0] inputs as shown in Table 2 . Refer to Driving the Clock Inputs for clock input
requirements. When CLKin0 or CLKin1 is selected, the crystal circuit is powered down. When OSCin is selected,
the crystal oscillator circuit will start-up and its clock will be distributed to all outputs. Refer to Crystal Interface for
more information. Alternatively, OSCin may be be driven by a single-ended clock (up to 250 MHz) instead of a
crystal.
CLKin_SEL1
0
0
1
Table 2. Input Selection
CLKin_SEL0
0
1
X
SELECTED INPUT
CLKin0, CLKin0*
CLKin1, CLKin1*
OSCin
Table 3 shows the output logic state vs. input state when either CLKin0/CLKin0* or CLKin1/CLKin1* is selected.
When OSCin is selected, the output state will be an inverted copy of the OSCin input state.
Table 3. CLKin Input vs. Output States
STATE of
SELECTED CLKin
CLKinX and CLKinX*
inputs floating
CLKinX and CLKinX*
inputs shorted together
CLKin logic low
CLKin logic high
STATE of
ENABLED OUTPUTS
Logic low
Logic low
Logic low
Logic high
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