LMK00306_16 Datasheet, PDF (14/39 Pages) Texas Instruments – 3-GHz 6-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator

LMK00306
SNAS578D – FEBRUARY 2012 – REVISED MARCH 2016
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6.6 Typical Characteristics
Unless otherwise specified: Vcc = 3.3 V, Vcco = 3.3 V, T_A = 25 °C, CLKin driven differentially, input slew rate ≥ 3 V/ns.
Consult Table 1 at the end of Typical Characteristics for graph footnotes.
1.0 _{Vcco=2.5 V, Rterm=91}
0.9 ^{Vcco=3.3 V, Rterm=160}
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
100
1000
FREQUENCY (MHz)
10000
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
100
1000
FREQUENCY (MHz)
10000
Figure 1. LVPECL Output Swing (V_OD) vs. Frequency
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
-0.8
0.0
2.5
5.0
7.5
10.0
TIME (ns)
Figure 2. LVDS Output Swing (V_OD) vs. Frequency
0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
0.0
2.5
5.0
7.5
10.0
TIME (ns)
Figure 3. LVPECL Output Swing @ 156.25 MHz
0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
0.00 0.25 0.50 0.75 1.00
TIME (ns)
Figure 4. LVDS Output Swing @ 156.25 MHz
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
0.00 0.25 0.50 0.75 1.00
TIME (ns)
Figure 5. LVPECL Output Swing @ 1.5 GHz
Figure 6. LVDS Output Swing @ 1.5 GHz
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