GC5018 Datasheet, PDF (89/115 Pages) Texas Instruments – 8-CHANNEL WIDEBAND RECEIVER

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GC5018
8-CHANNEL WIDEBAND RECEIVER
SLWS169 – MAY 2005
ragc2_accum(15:0) : lower 16 bits of the ragc2 error accumulator.
4.4.4.62 RAGC2_ACCUM_MSB Register
Register name: RAGC2_ACCUM_MSB
BIT 15
0
0
0
BIT 7
0
0
0
Address: 0x3D
ragc2_accum(31:24)
0
0
0
ragc2_accum (23:16)
0
0
0
ragc2_accum(31:16) : upper 16 bits of the ragc2 error accumulator.
4.4.4.63 RAGC3_ACCUM_LSB Register
READ ONLY
0
0
BIT 8
0
BIT 0
0
Register name: RAGC3_ACCUM_LSB
BIT 15
0
0
0
BIT 7
0
0
0
Address: 0x3E
ragc3_accum(15:8)
0
0
0
ragc3_accum (7:0)
0
0
0
ragc3_accum(15:0) : lower 16 bits of the ragc3 error accumulator.
4.4.4.64 RAGC3_ACCUM_MSB Register
READ ONLY
0
0
BIT 8
0
BIT 0
0
Register name: RAGC3_ACCUM_MSB
BIT 15
0
0
0
BIT 7
0
0
0
Address: 0x3F
ragc3_accum(31:24)
0
0
0
ragc3_accum (23:16)
0
0
0
ragc3_accum(31:16) : upper 16 bits of the ragc3 error accumulator.
4.4.5 DDC Channel Controls
4.4.5.1 FIR_MODE Register
READ ONLY
0
0
BIT 8
0
BIT 0
0
Register name: FIR_MODE
BIT 15
cdma_mode
unused
0
0
unused
0
Address: 0x0
crastarttap_pfir(4:0)
0
0
0
0
BIT 8
0
GC5018 GENERAL CONTROL
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