GC5018 Datasheet, PDF (3/115 Pages) Texas Instruments – 8-CHANNEL WIDEBAND RECEIVER

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dvga_b dvga_d
dvga_a dvga_c
6666
16
16
Digital receive
data ports
16
16
rxin_a
adcclk_a
rxin_b
adcclk_b
rxin_c
adcclk_c
rxin_d
adcclk_d
trst_n
tck
tdi
tms
JTAG
tdo
Receive Input
Interface
Power
Measurements and
WidebandAGC
4
rx_sync a−d
reset_n
Control and Sync
interrupt
rx_sync_out
16
6
d(15:0) a(5:0) rd_n wr_n ce_n
rxclk
GC5018
8-CHANNEL WIDEBAND RECEIVER
SLWS169 – MAY 2005
DDC0
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC1
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC2
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC3
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC4
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC5
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC6
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC7
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
I
Q
sync
I
Q
sync
I
Q
sync
I
Q
sync
I
Q
sync
I
Q
sync
I
Q
sync
I
Q
sync
32
Output
Format
Parallel
8
or Serial
rxout_X_X
rx_sync_out_X
rxclk_out
3 RECEIVE DIGITAL SIGNAL PROCESSING
The down conversion section of the GC5018 consists of the receive input interface, the rx_distribution
bus, and 8 digital downconverter blocks.
The purpose of the receive input interface is to accept signal data from four 16 bit input ports, measure the
input signal power, control the digital VGA and to distribute the data to the DDC blocks. The input
interface also has a user-controlled test generator and noise source.
The rx_distribution bus distributes the four channels of signal data to each of the 8 DDC blocks.
Each DDC block selects one of the four channels (or 2 for complex input data) from the rx_distribution bus
and then performs downconversion tuning, programmable delay, channel filtering with decimation, power
measurement, fixed gain adjust and/or automatic gain control. Each DDC block can support 1 UMTS
channel, 2 CDMA channels or 2 TD-SCDMA channels. An optional mode permits stacking two DDC
blocks in UMTS mode to provide double-length final pulse shaping filtering.
Tuned, filtered, and decimated signal data is output in bit serial or parallel format.
RECEIVE DIGITAL SIGNAL PROCESSING
3