SI5338 Datasheet, PDF (90/170 Pages) Silicon Laboratories – I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR

Si5338
Register 85.
Bit D7
Name
Type
D6
D5
MS3_FIDCT[1:0]
R/W
D4
MS3_FIDDIS
R/W
D3
D2
MS3_SSMODE[1:0]
R/W
D1
D0
MS3_PHIDCT[1:0]
R/W
Reset value = xxxx xxxx
Bit
Name
Function
7
Reserved
Reserved.
MultiSynth3 Frequency Increment/Decrement Control.
Bit 4 (disable) must be 3 before writing an increment or decrement to these
bits.
6:5
MS3_FIDCT[1:0] 0: No frequency inc/dec on MS3
1: Reserved
2: Frequency increment on MS3, self-clearing
3: Frequency decrement on MS3, self-clearing
MultiSynth3 Frequency Increment/Decrement Disable (see also
Register 242[1]).
4
MS3_FIDDIS
0: Frequency inc/dec enabled on MS3
1: Frequency inc/dec disabled on MS3
MultiSynth3 Spread Spectrum Mode Select.
0: No SSC on MS3
3:2
MS3_SSMODE[1:0] 1: Center spread on MS3
2: Reserved
3: Down spread MS3
MultiSynth3 Phase Increment/Decrement Control.
0: No phase inc/dec on MS3
1:0
MS3_PHIDCT[1:0] 1: Enable pin control of phase inc/dec
2: Phase increment on MS3
3: Phase decrement on MS3
90
Rev. 0.6