SI5338 Datasheet, PDF (140/170 Pages) Silicon Laboratories – I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR

Si5338
Register 242.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
DCLK_DIS
Type
R/W
Reset value = xxxx xxxx
Bit
Name
Function
7:2
Reserved Reserved.
Disable Clock to INC/DEC State Machine.
1
DCLK_DIS _{When true, the frequency inc/dec logic is disabled, which saves about 2 mA of current.}
See also Registers 52[4], 63[4], 74[4], 85[4].
0
Reserved Reserved.
Register 246.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
SOFT_RESET
Type
R/W
R/W
Reset value = xxxx xxxx
Bit
Name
Function
7:2
Reserved Reserved.
Soft Reset.
This reset will disable all clock outputs, then re-acquire the PLL to the input clock and
1
SOFT_RESET ^{the enable all the clock outputs. Retains device configuration stored in RAM. Do not}
use read-modify-write procedure to perform soft reset. Instead, write reg246=0x02,
regardless of the current value of this bit. Reading this bit after a soft reset will return a
1.
0
Reserved Reserved.
140
Rev. 0.6