SI5338 Datasheet, PDF (63/170 Pages) Silicon Laboratories – I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR

Si5338
Register 35.
Bit
Name
Type
D7
D6
DRV3_VDDO[1:0]
R/W
D5
D4
DRV2_VDDO[1:0]
R/W
D3
D2
DRV1_VDDO[1:0]
R/W
D1
D0
DRV0_VDDO[1:0]
R/W
Reset value = xxxx xxxx
Bit
Name
Function
VDDO Setting for CLK3.
0: VDDO3 = 3.3 V (not for HSTL)
7:6 DRV3_VDDO[1:0] 1: VDDO3 = 2.5 V (not for HSTL)
2: VDDO3 = 1.8 V (not for HSTL or LVPECL)
3: VDDO3 = 1.5 V (HSTL only)
VDDO Setting for CLK2.
0: VDDO2 = 3.3 V (not for HSTL)
5:4 DRV2_VDDO[1:0] 1: VDDO2 = 2.5 V (not for HSTL)
2: VDDO2 = 1.8 V (not for HSTL or LVPECL)
3: VDDO2 = 1.5 V (HSTL only)
VDDO Setting for CLK1.
0: VDDO1 = 3.3 V (not for HSTL)
3:2 DRV1_VDDO[1:0] 1: VDDO1 = 2.5 V (not for HSTL)
2: VDDO1 = 1.8 V (not for HSTL or LVPECL)
3: VDDO1 = 1.5 V (HSTL only)
VDDO Setting for CLK0.
0: VDDO0 = 3.3 V (not for HSTL)
1:0 DRV0_VDDO[1:0] 1: VDDO0 = 2.5 V (not for HSTL)
2: VDDO0 = 1.8 V (not for HSTL or LVPECL)
3: VDDO0 = 1.5 V (HSTL only)
Note: If the VDDOx voltage is below the minimum allowed voltage of the programmed voltage setting in Register 35, the
output driver may not turn on.
Rev. 0.6
63